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This is the first time I build the H-Bridge MOSFETs driver circuit. Due to some limitation of desired components. It is all SMD, so I don't really have a proper way to test it before building the board. Can you please take some minutes to look at the schematic and if there is something wrong that catch your eyes, please let me know!

Here is the schematic enter image description here

Edit:

The FET part number is SISS98DN-T1-GE3

The Driver is IRS2004

Walkthrough:

The circuit will receive a PWM signal from uC at 1 kHz to control the speed of the motor as well as the direction.

The bootstrap components are designed to switch the high-side gate at 15V maximum (actual switching voltage is 13.9V).

The gate driver is synchronous half-bridge type. I believe when there is an input signal, the high-side FET would turn on and the low-side FETs on both sides would stay off? (I am not really sure about this part)

Here is the block diagram of the Gate Driver enter image description here

Note: I study a many different gate driver circuits and came up with this. Still in the learning phase. B1

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  • \$\begingroup\$ With 180 V supplies, the part numbers of the FETs are probably important to include. \$\endgroup\$ – The Photon Jun 28 '18 at 4:36
  • \$\begingroup\$ My first comment is that the peak reverse voltage for the SDM20U40 is 40 V, but to be a ~180 V transient each time you switch the upper FETs on. \$\endgroup\$ – The Photon Jun 28 '18 at 4:41
  • \$\begingroup\$ Are those driver IC's designed to handle +180 V on the VS pin? \$\endgroup\$ – Sparky256 Jun 28 '18 at 4:58
  • \$\begingroup\$ If you designed this circuit, why not include a personal walk-through? \$\endgroup\$ – jonk Jun 28 '18 at 5:02
  • \$\begingroup\$ @ThePhoton For the SMD20U4, I believe the part is designed to sink the gate voltage, is that correct? If so the gate voltage at maximum is ~15 V. Do I understand something incorrectly here? \$\endgroup\$ – AlexT Jun 28 '18 at 5:41

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