# maximum possible common mode voltage for npn

First I would like to thank everybody here for providing the help. This great resource allows me to understand things beyond what my textbook only offers. I have the question below:

Here is the figure they are referring to in the question:

(Source of images: "Microelectronic Circuits" book by Sedra/Smith, 7th edition, chapter 9)

# HERE YOU FORGET TO INSERT AN IMPORTANT ASSUMPTION

AND IT EXPLAINS WHY YOU ARE MISSING 0.4 V taken from sedra-smith

So using the small signal analysis model, which am not going make you bored from it, I was able to find the value to Rc = 5k ohms which totally agrees with the text book's answer. Now my struggle is to find the maximum Vcm. Here is my analysis

$$V_{cm,max}=V_{BE}+V_C=0.4+V_{CC}-\frac{I}{2}R_C=0.4+5-\left(0.5mA\right)\left(5k\Omega \right)=2.9V$$

But my book says that:

$$V_{cm,max}=1.6V$$

UPDATE 1: Here is an LTspice simulation of the problem. Please let me know if my model is correct or not because am a beginner with LTSpice. You can see from the simulation results that change in collector voltages and currents don't happen till around vb=2.9V

• It seems to me that for which operation is as required implies that you need to account for an additional differential output swing. I also think it's incorrect to calculate the input common mode range without any mention of the base (eg. a $V_{BE}$). Despite this, I also can't see how the CM input range would be that limited. Jul 2, 2018 at 8:14
• You've provided a formula, not an analysis. Please provide the sound reasoning you used to reach that formula. Also, where did that 400mV come from? It's not in the text you offered. If I'm allowed to apply 400mV to the problem, I can soundly reason a case for their $1.6\:\text{V}$. Under no circumstances can I find a way to accept your formula. So your reasoning here would help identify your mistake.
– jonk
Jul 2, 2018 at 10:33
• You mainly forgot about the voltage swing at the transistor collector.
– G36
Jul 2, 2018 at 16:24
• I think the problem is melting down to me adding 0.4V and you subtracting 0.4V. So my book says: $$V_{BC}=0.4=V_B-V_C\\therefore\\ V_B=V_{cm,max}=0.4+V_C=0.4+V_{CC}-\frac{I}{2}R_C=0.4+5-\left(0.5mA\right)\left(5k\Omega \right)=2.9!!!!$$ using this equation from my book only, I don't know how they are getting 1.6V??? Jul 2, 2018 at 17:51
• Mine is Sedra Smith 7th edition chapter 9 Jul 2, 2018 at 19:53

You need Vout = 1V when you have Vin = 10mV. These values are fully-differential. That means at single-ended input of 5mV you have to got a 500mV change in output.

First get the g_m of one Q1 by:

$$g_m = \cfrac{I_c}{2\cdot V_{Th}} = \cfrac{1mA}{2\cdot 25\,mV} = 20 \, mS\, ,$$

assuming that the Q1 runs at room temperature. Therefore, when we have the maximum input voltage of 5mV, you get:

$$\Delta I_C = g_m\cdot \Delta v_{BE} = 20\, mS \cdot 5\, mV = 0.1\, mA\, .$$

To get a value of R_c, you have to remind that the voltage drop has to be 500mV:

$$R_C = \cfrac{500\, mV}{\Delta I_C}\, = 5\,k\Omega .$$

The branch with the higher current in the differential amplifier sets the maximum allowable common mode input voltage.

Looking at the circuit diagram below, you can set a voltage loop of the input.

simulate this circuit – Schematic created using CircuitLab

$$V_{CC} - R_C \cdot \Bigg(\cfrac{I}{2} + \Delta I_C \Bigg) - V_{BC}\ge V_{in\,\text{Common mode}} + V_{in\, \text{diff mode}} \\ 5\, V - 5\, k \cdot 0.6 \, mA + 0.4\, V\ge V_{in\,\text{Common mode}} + 5\, mV \, \\ V_{in\,\text{Common mode}} \le 2.395 \,V\quad .$$

NOTE:When the voltage at the collector is higher than the base voltage, the transistor Q1 keeps in the triode (linear, active) region. In this textbook and as simulation shows, the base-collector diode can open until a voltage of 400mV is reached, without influencing the gain stage.

Your textbook has forgotten to include the 5mV of the max. differential input voltage. In case the gain is high, it doesn't change much, however, when the gain is low (e.g. 2), it matters! If the gain is 2, and you want to have a max. single-ended output swing of 500mV, you get a V_differential/2 of 250mV! , wich you have to add to your max. allowablecm input range. Most textbook ignore that case!

Here is the simulation result

The black curve is the collector voltage of Q1, which starts to increase at a common mode input voltage of 2.45V

• You are totally correct and that is the why I look at it too. As long as the collector is at a voltage higher than the base then the base-collector junction is reversed baised which makes the transistor stay in the active region. Of course this is the general case, because my book is more percise about that. It says to keep the transistor in active, Vbc<=0.4V. and that where the equation in my qestion comes from. Vb=vcm, Vc is the collector voltage already known from Vcc and Rc. Doing the mathematics, I get Vcm=2.9V and your answer is kinda close to 2V. But the book says vcm should equal 1.6V Jul 2, 2018 at 16:35
• But I still don't get how they got vcm=1.6?? am really confused and that what I posted the question for Jul 2, 2018 at 16:53
• In your original post you wrote V_CE = 400mV, should be V_BC = 400mV. Jul 2, 2018 at 17:19
• Why did you subtracting this 0.4V? I don't get it.
– G36
Jul 2, 2018 at 18:39
• So all this means the if we assumed that before transistor enters saturation region the Vbc voltage can reach 0.4V. The voltage at collector can "safety" go below the base voltage be this 0.4V. And this why Raykh textbook adds this 0.4V.
– G36
Jul 2, 2018 at 19:07