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I have a signal which toggles between 7v and 0v up to 100 million/sec. The receiving IC only accepts voltage levels up to 3.3v.

What would be the best way to lower the voltage from 7 to 3.3? I considered a voltage divider, but wondered whether the resistors would distort the signal at such high frequencies.

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    \$\begingroup\$ Where is this 100MHz 7V digital signal coming from? What is the impedance? \$\endgroup\$ Commented Jul 4, 2018 at 1:06
  • \$\begingroup\$ I've not worked with anything quite this high frequency, but resistors tend to be pretty good at not distorting signals, especially if you get low-inductance ones. \$\endgroup\$
    – Hearth
    Commented Jul 4, 2018 at 3:10
  • \$\begingroup\$ @Felthry, most concern with resistor dividers is due to input capacitance of receiver pins/packages. But if you have at most 10pF (10^-11 F) and use, say, 100-Ohm resistor, the RC will be 1ns, or good up to 1 GHs or something. \$\endgroup\$ Commented Jul 4, 2018 at 4:48

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There is a class of basic gates called "level-translating" logic, or "level shifters", or a combination thereof. An example is SN74LV1G34, With Vcc set to 6V, the circuit will accommodate your "7-V" signal, and produce clean output signal, works up to 50 MHz though. You might need to search for faster ICs. This would be a technically clean solution.

However, depending on your source and receiver, a simple diode limiter with a 100-Ohm series resistor will do the job as well. Or maybe even nothing is needed.

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