I see different documentation on the Internet about the dsPIC30F family. Especially I am interested in System Configuration registers.
http://ww1.microchip.com/downloads/en/DeviceDoc/70071E.pdf - document from 2008. It lists the following registers:
- FOSC: Oscillator Configuration Register (Note 2) (0xF80000)
- FWDT: Watchdog Timer Configuration Register (0xF80002)
- FBORPOR: BOR and POR Configuration Register (0xF80004)
- FBS: Boot Segment Configuration Register (0xF80006)
- FSS: Secure Segment Configuration Register (0xF80008)
- FGS: General Segment Configuration Register (0xF8000A)
- FICD: In-Circuit Debugger Configuration Register (0xF8000C)
While another document http://ww1.microchip.com/downloads/en/DeviceDoc/70271b.pdf (from 2009) shows different set of registers:
- FBS: Boot Code Segment Configuration Register
- FGS: General Code Segment Configuration Register
- FOSCSEL: Oscillator Source Selection Register
- FOSC: Oscillator Selection Configuration Register
- FWDT: Watchdog Timer Configuration Register
- FPOR: Power-on Reset Configuration Register
- FICD: In-Circuit Debugger Configuration Register
The lists themselves and descriptions of the bits (ex the FICD register) differ in significant details.
Both documents do not tell anything about part numbers or silicon revisions they describe.
Does anybody know what doc is better/more accurate? Is there any way to check what config registers are really implemented in the chips that I have in my hands?