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I am trying to use the ethernet phy on my FPGA. I am at the point where I can receive a frame. The frame I can see using chipscope matches the data of the frame sent from my computer which I can confirm using tcpdump. However the crc I am computing does not seem to match. The last 4 bytes of my packet as seen on the card are 0x4b504124. However, both my on card calculation and C++ calculation which match are 0xC3899D7. I thought the c code which I copied from somewhere was correct for ethernet. I checked it against some other c code I found and they match. Can someone point me to a correct implementation of c code for ethernet crc, or tell me what I am doing wrong?

unsigned int crc32b(unsigned char *message, int sz) {
   int i, j;
   unsigned int byte, crc, mask;

   i = 0;
   crc = 0xFFFFFFFF;
   while (i < sz) {
      byte = message[i];            // Get next byte.
      crc = crc ^ byte;
      for (j = 7; j >= 0; j--) {    // Do eight times.
         mask = -(crc & 1);
         crc = (crc >> 1) ^ (0xEDB88320 & mask);
      }
      i = i + 1;
   }
   return ~crc;
}
...
uint16_t buf[] = 
{
    0x3333, 0x0000, 0x00fb, 0x0050, 0xb624, 0x9756, 0x86dd, 0x600b,
    0xa860, 0x0035, 0x11ff, 0xfe80, 0x0000, 0x0000, 0x0000, 0x6191,
    0xd947, 0x7f85, 0xc538, 0xff02, 0x0000, 0x0000, 0x0000, 0x0000,
    0x0000, 0x0000, 0x00fb, 0x14e9, 0x14e9, 0x0035, 0x7e5c, 0x0000,
    0x0000, 0x0002, 0x0000, 0x0000, 0x0000, 0x055f, 0x6970, 0x7073,
    0x045f, 0x7463, 0x7005, 0x6c6f, 0x6361, 0x6c00, 0x000c, 0x0001,
    0x045f, 0x6970, 0x70c0, 0x1200, 0x0c00, 0x0001
};
unsigned char* data = (unsigned char*)buf;
std::cout << crc32(data, sizeof(buf)) << std::endl;
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  • \$\begingroup\$ Could you include a dump of the packet you are sending? When you calculated the CRC, did you do it for the whole packet? or did you exclude the last 4 bytes? \$\endgroup\$ – Tom Carpenter Jul 6 '18 at 11:06
  • \$\begingroup\$ I excluded the last 4 bytes. The data in buf is the packet data. \$\endgroup\$ – chasep255 Jul 6 '18 at 11:19
  • \$\begingroup\$ Does the FPGA initialize its CRC generator with the same code (0xEDB88320)? \$\endgroup\$ – Lior Bilia Jul 6 '18 at 12:14
  • \$\begingroup\$ No it uses 0xFFFFFFFF as the initial crc. I don't think 0xEDB88320 is the correct initial value. \$\endgroup\$ – chasep255 Jul 6 '18 at 12:36
  • 1
    \$\begingroup\$ Also, why is your buf a bunch of int16 instead of int8 or char? You sure that's being interpreted correctly? \$\endgroup\$ – alex.forencich Jul 7 '18 at 18:10

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