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I'm having trouble understanding the solution to this digital circuit problem involving muxes. Could anybody explain how they got to this answer.

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This problem is an exercise in converting logic gates to multiplexers, which are essentially used as look-up tables.

Let's first redraw the leftmost of the four identical parts of the circuit, which are the basic building blocks:

schematic

simulate this circuit – Schematic created using CircuitLab

Now we have to convert this logic circuit into an equivalent circuit with the least amount of 2-to-1 multiplexers possible. Multiplexers can be used as look-up tables and can implement every existing logic gate, provided they have enough input pins.

  • Can we do it with one? Obviously not, we don't have enough inputs.
  • Can we do it with two? Yes! Because now we can replace both gates (NOT, AND and XOR) with a MUX each that has the same truth table.

An equivalent MUX circuit for the NOT, AND gate would be:

schematic

simulate this circuit

An equivalent MUX circuit for the XOR gate would be:

schematic

simulate this circuit

The exercise text states that the inputs are also available in complement (inverted) form. So I used one of these complement signals as a_inv.

If we now assemble the subcircuits we get the equivalent of the original circuit:

schematic

simulate this circuit

If you compare the truth table of the original circuit with this multiplexer equivalent you will see that they are equal.
In text form, my circuit equals the first exercise solution: mux(a, a', mux(c, '0', b))

You should now be able to derive from that the second solution and also the solution for output x in the original exercise diagram.

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  • \$\begingroup\$ Fantastic answer sir, thank you for taking the time to respond. \$\endgroup\$ – rofldude188 Jul 8 '18 at 18:14

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