I am currently undertaking my first hardware design attempt of an embedded Ethernet project w/ PoE+. I have experience working with embedded systems with Ethernet (mostly ARM M3/M4 processors with RMII interface to an external Ethernet PHY transceiver), but this is my first time actually doing the hardware design for an Ethernet capable device. I will also be writing the firmware for this project.
The purpose of this project is to create a downstream I/O board that communicates over TCP/IP to a controller board. Multiple downstream boards will be connected to one controller and report analog input statuses as well as execute output control commands from the controller. This downstream board will also have a basic web server that will be accessed via a web browser so a user can set configuration options.
In regards to the PoE+ feature, I will be using a third party module. I bring up the PoE+ in case this has any impact on the answer to my question, but I don't think it does.
I will be using an ARM Cortex processor so there are two paths to take for embedded Ethernet...
(1) ARM Cortex M3/M4 processor with internal MAC and (R)MII interface to external PHY. And then obviously the RJ45 and magnetics. This design I am familiar with and I know will guarantee satisfy my needs.
Or the other, less expensive option that I am considering...
(2) ARM M0+ processor with external 3-in-1 Ethernet controller interfaced with SPI. And then obviously the RJ45 and magnetics. For the SPI Ethernet controller, I am looking at the Microchip KSZ8851SNL.
Can anyone give me a reason NOT to go with the less expensive M0 route with external Ethernet controller. Ultimately, the only cost savings is about $4 or $5 for the M0 vs M4 processor setup because both the external PHY and external MAC+PHY controller are basically the same price. This however will be a mass produced design so any savings makes a difference as volume goes up.
I am mainly concerned with potential bottlenecks in performance using the SPI interface, however I am also thinking that with such minimal traffic requirements, I should be OK with the SPI interface. The datasheet for the KSZ8851SNL says it can run at a MAX SPI clock speed of 40MHz. I am not sure if I would need to run at the max or if a slower clock speed would do. And then what would the minimum clock speed of the M0 MCU be to get good performance (no lag loading pages etc)? I am looking at M0 options that have a max clock speed of 50-75 MHz.
Firmware wise, is MII or SPI more difficult to implement, or are they the same difficulty?
What are some network applications or requirements that would make SPI Ethernet controllers not cut it and I would need to use the MII with a more advanced processor?
Or in any of your humble opinions, is it worth it just to go for the M4 MII solution and have a future proof design that could also be re-used for new, upcoming hardware projects?
And lastly, in regards to PoE+, am I correct in thinking that PoE+ will be unaffected by SPI vs MII? Also would it be possible to design the board in a way that PoE+ population is optional? Basically can I offer a Ethernet OR a Ethernet with PoE+ assembly option with the same board design? I think the PoE+ is a parallel circuit so PoE+ should be able to be optional without effecting Ethernet data transmission.
Sorry for the long read and I appreciate any insights!