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I want to make a dc voltage buffer using an nmos source follower. I found that by making Rs as large as possible or even open, Vs= Vgs-Vth. I verified it using multisim. The problem is it suffers from loading effects. I wanted to make a dc voltage buffer using the least amount of transistors.enter image description here

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  • \$\begingroup\$ Use a BJT for much better input-output conformance and make sure it is properly biased. \$\endgroup\$ – Andy aka Jul 13 '18 at 18:03
  • \$\begingroup\$ Why use a W=L=100u? Have you tried a much larger W/L ratio? \$\endgroup\$ – Sven B Jul 13 '18 at 21:38
  • \$\begingroup\$ This won’t do what you expect \$\endgroup\$ – Sunnyskyguy EE75 Jul 13 '18 at 23:26
  • \$\begingroup\$ @Tony EE rocketscientist Why? I've seen this used in research articles to read out the floating gate voltage of a mosfet \$\endgroup\$ – ElecNoob Jul 14 '18 at 4:34
  • \$\begingroup\$ i.stack.imgur.com/6Hq2x.jpg at (b) you can see the floating gate is read by the source follower. Here's a link to the full document: tohoku.repo.nii.ac.jp/… \$\endgroup\$ – ElecNoob Jul 14 '18 at 4:38

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