Let's take MSP430G2553 as an example. If you look at the pinout in datasheet, you'll see:
One could think that those TA signals identical and multiplexed twice as a courtesy to folks doing PCB routing, but looking up pins in "Terminal Functions" table, it becomes clear that they are different:
- P2.1/TA1.1: GPIO; Timer1_A, capture: CCI1A input, compare: Out1 output
- P2.2/TA1.1: GPIO; Timer1_A, capture: CCI1B input, compare: Out1 output
So, when that capture/compare channel is used in compare mode, they are indeed identical. But for capture mode, they represent 2 different signals to start a capture, which one to use is selected in the control register. So the question is: Why so magic? Can someone decipher a usecase TI engineers had in mind while designing it? Don't get me wrong, it's cool to have twice more capture inputs, but if they're so nice, why don't put twice more real independent C/C channels?
Following up with the questions, suppose I have 6 P2 pins which have such C/C altfuncs (i.e. 3 channels, and 2 capture signals for each channel), and I need to use 3 of them for GPIO - what would be more flexible (future-proof, extensible) arrangement of pins? My obvious guess is that I should leave 3 independent C/C channels, and use "extra capture signal" pins for GPIO, but again, maybe I'm missing something?