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For my design I need a bunch of 2222A transistors with each transistor dissipating at maximum ~500mW of power. The transistors come in single packages, dual packages, and quad packages. The datasheet has it listed as "Total Device dissipation" for the single at 300mW, "Total Device dissipation" for the double at 700mW, and "Total Device dissipation" for the quad at 1000mW.

Does "Total Device dissipation" refer to the individual transistor(s) in the package or to the entire package?

https://www.fairchildsemi.com/datasheets/FM/FMB2222A.pdf

Edit: None of the answers have really made me feel its confidently its one or the other so here's another way we could answer the question maybe more definitively.

TI has a document on understanding power dissipation: http://www.ti.com/lit/an/slva462/slva462.pdf

The unit in question is \$P_D\$ on the data sheet. TI tells us that this value can be derived from the following equation. Maximum Power Dissipation \$P_{DMAX}\$ is defined as the following

\$P_{DMAX} = \frac{T_{JMAX}-T_A}{\theta_{JA}} \$

From the data sheet it gives maximum operating junction at \$T_{JMAX} = 150C\$
The ambient temperature will be room temperature which is \$T_A = 25C\$
The question now is what does the data sheet means by "Thermal Resistance" \$R_{\theta JA}\$?

For the single package it has "Thermal Resistance, Junction-to-Ambient" at \$R_{\theta JA} = 415C/W\$ which does equate to 300mW. So for the single package no doubt it has a dissipation of 300mW for the package and device

For the double it has "Thermal Resistance, Junction-To-Ambient" at \$R_{\theta JA} = 180C/W\$ which equates to ~700mW.

For the quad it has two different paramters. "Thermal Resistance, Junction-to-ambient, Effective 4 dies" \$R_{\theta JA} = 125C/W\$ which equates to 1000mW and it has "Thermal Resistance, Junction-to-ambient, each die \$R_{\theta JA} = 250C/W\$ which equates to ~500mW

For the double package it almost seems as though thermal resistance refers to each individual transistor making each device have a consumption of 700mW and the whole package a consumption of 1400mW

For the quad package it seems like effective 4 dies means divide result by 4 so each transistor dissipates 250mW but then it says each die and results in 500mW.

So I am again still confused. Thoughts?

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  • \$\begingroup\$ Unless you have an infinite heatsink or operating in sub-zero conditions you must derate the package max power to keep the junctions cooler. Consider a good design is 85’C max at 40’C ambient and a poor design >100’C at 25’C ambient. \$\endgroup\$ – Tony Stewart Sunnyskyguy EE75 Jul 14 '18 at 21:06
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It's per package, also you will have to derate for ambient temperature so the maximum per transistor is the dual at 350mW per transistor at 25'C.

However note that that puts the junctions at 151'C at 25'C Ta. The 25'C ambient maximum is unrealistic in most cases, and 151'C is very high if you care about reliability. Personally I think more like 150mW per transistor would be more conservative. That would yield a Tj of about 125'C at Ta = 70'C.

If you need a nominal dissipation of 500mW per transistor, I suggest individual TO-252 or at a minimum SOT-89 transistors, mounted on an adequate area of copper.


Just as an aside, it's unusual to have a wimpy transistor like a 2N2222A dissipating 1/2-W, there could be other issues cropping up like SOA. Makes me think you might be doing something wrong, but that's just a guess, feel free to ignore if you are all set.

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  • \$\begingroup\$ It is more than likely I am doing something very inefficient. What I'm trying to do: Build a constant current source for a variable resistive load (ranging anywhere from 0.1 ohms to 20 ohms). The supply is to be controlled by a computer. So I have a DAC that is used to generate a reference current and then a 10x gain current mirror to create the supply current. Each 2222A is in the current mirror and essentially burn the excess power. I chose a linear supply as the application is noise sensitive and I am too inexperienced to figure out how to suppress noise. \$\endgroup\$ – cowpaste Jul 14 '18 at 21:34
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    \$\begingroup\$ @cowpaste +1 You indeed have a realistic application where burning the power in the transistors is sensible. I simply suggest a more beefy transistor. A TO-220 through hole part for example or TO-252 part if you want SMT. \$\endgroup\$ – Spehro Pefhany Jul 14 '18 at 21:47
  • \$\begingroup\$ Eg. MJD31 \$\endgroup\$ – Spehro Pefhany Jul 14 '18 at 21:57
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    \$\begingroup\$ I took a look at the data sheet and popped the component into a PSpice simulation just to make sure everything looked right. The MJD31 looks to be a great choice to handle my needs. I was hoping to minimize board space and ease routing by utilizing the quad 2222A package but it looks like I won't be able to find anything of the sort. I will go with the TO-252 SMD package and at this point the only other consideration I may need is to make sure there is enough copper for any heating that dissipates to the traces. Thank you for your guidance! \$\endgroup\$ – cowpaste Jul 14 '18 at 23:07
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    \$\begingroup\$ Unfortunately it takes size to safely get rid of heat. \$\endgroup\$ – Spehro Pefhany Jul 14 '18 at 23:25
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Surely, it's the overall package's ability to dissipate power, not the individual transistors' ratings. Consider that right above that table is the Absolute Maximums table, which unconditionally states that the continuous collector current must not exceed 500mA.

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It refers to the "total" dissipation of all the units in the package. So, for instance, if the individual transistors are dissipating equal power, a double could dissipate 350 mW per transistor, but a quad will only allow 250 mW per each.

So, in your case, you are out of luck. None of the packages will allow you to dissipate 500 mW per device.

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The total device dissipation indicates what is the maximum dissipation that you can have on your device. This means that even if you put a proper heatsink, yur device may not sustain higher power.

This also mean that at such power, with 8 mW/°C of thermal resistance with 125°C/W of thermal resistance, your device will increase 125°C over the ambient at 1000mW, and since the maximum device temperature is 150°C, at an ambient temperature higher than 25°C you can't dissipate 1000mW and you must derate to stay below 125°C+25°C. How much you can dissipate on each transistor, is just matter of division (here 1000mW/4 is 250 mW, up to 25°C).

So, yes, the total device dissipation is the maximum power that the device (with all the transistors included, not each of them) can stand without damage, when ambient temperature is below 25°C.

But in the other answers (i.e. like Spehro) you can get the "gut" on how to derate with a bit of margin.

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  • \$\begingroup\$ No, the thermal resistance is not 8 mW/°C, that is the derating factor for the quad package. The thermal resistance is 125°C/W. The numbers work out...at an ambient temperature of 25°C and power dissipation of 1000mW the die temperature is 150°C. \$\endgroup\$ – Elliot Alderson Jul 14 '18 at 20:46
  • \$\begingroup\$ Yes, I misread. The multiplication I made at this point demonstrates only their correctness in derating. But still, 125°C/W indicates 125°C per 1000mW, so again, above 25°C one shall derate to stay below 125°C+Tamb. I will edit \$\endgroup\$ – thexeno Jul 14 '18 at 21:51

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