# Thermal resistance - transistor temperature

I have a transistor with Vsupply = 24 VDC, VCEO = 45 VDC, and ICE = 20 mA.

How do I calculate the ΔT (rise in temperature) of this transistor? I would like to know what thermal resistance I may have at maximum.

In my opinion:

Pdissipation (worst case) = 24 VDC * 20 mA = 480 mW (current loop, almost all current goes through this transistor).

If the thermal resistance is, for example, 120 K/W (or °C/W) the ΔT would be: 120 * 0.48 = 57.6 °C (rise). This means my transistor will heat up to around 25 (ambient) + 57.6 = 82.6 °C.

Is my calculation correct, or do I need to observe other parameters as well? I need a very small transistor package, but it must be able to dissipate ~500 mW and work in an ambient environment of +55 °C.

• 20 mA ok , but 500mA not possible , 12 W could need a heatpipe with forced air over a heatsink or better a buk regulator for current regulation, Did you mean ~500 mW? Commented Jul 18, 2018 at 13:59
• No I really meant 20mA. If you look at my previous post: electronics.stackexchange.com/questions/384596/… This is where it is used. Q1, second answer. Commented Jul 19, 2018 at 6:31
• Why/where “500mA... in 55’C ambient”? Commented Jul 19, 2018 at 11:31

Your basic understanding is correct. You say a "very small" package...the calculation may be more complex depending on what package you select. You may need to calculate heat transfer through the device leads to the PCB as well as transfer from the case to the ambient air. You may want to have a look at Texas Instruments Application Report SPRA953B, "Semiconductor and IC Package Thermal Metrics".

I have a transistor with VCEO = 24VDC, ICE = 20mA

Vceo is the maximum voltage the transistor can withstand on its collector measured relative to its emitter with the base open circuit.

See this for clarification.

So no, you can't run a transistor at its absolute maximum rating without reliability issues. Other than that your calculation appears sound.

• Sorry, see edit. I meant Vsupply = 24VDC. The VCEO = 45VDC. Thanks for you input. Commented Jul 18, 2018 at 13:48

Assuming your thermal resistance is junction-to-ambient, you may have to add the enclosure temperature rise and possibly other things.

Especially with SMT packages the amount and layout of copper makes a big difference to the thermal resistance. Minimum copper on a single layer board vs. surrounded by copper on a multilayer board can be a large ratio.

For example, and using your number, if the ambient is 55°C and the enclosure rise is 15°C then the junction temperature might be close to 100°C, which is probably acceptable. There's no point in carrying these calculations to several decimal places, the thermal resistance is not that well controlled- so you should have ample safety margin, plus keep the Tj well, well below the abs. maximum value if you care about reliability.