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I am currently studying how transistors react and behave to simple signals. I have the following circuit:

Current Setup

A square wave of approximately 83kHz is applied. The transistor used is a 2N5551. The resistor values were carefully chosen to try to avoid transistor saturation. However, with this setup, slow turn-off time is still experienced. Measurements were taken with a PC oscilloscope and are shown below. The full data can be found here.

Base and Clock Collector and Clock Collector and Base

The y-axis is voltage, the x-axis is time. All voltage levels are relative to ground. The 3-images are not aligned at the same point in time, but the clock signal should help with comparing the graphs. One full cycle is around 12 microseconds, and the on-time and off-time of the clock signal is 6 microseconds long. The clock signal was generated with a 555 timer, the duty cycle is very close to 50%.

As it can be observed in the Collector and Clock graph, when the clock turns to 0V, the transistor stays on for almost 3 microseconds before it fully turns off and the collector settles to 5V. This can also be observed in the Base and Clock graph, where the base of the transistor is at around 0.75V for almost 3 microseconds before it starts transitioning to 0V. The Collector and Base graph helps show that the transistor is not operating in the saturation region since Vb <= Vc. Vc seems to fall below Vb for a very short time, but I do not believe this is causing saturation. In fact, a Schottky diode would not help at all since the voltages are very close to each other. Hence, this should not be a storage-time issue. I have also ruled out the transistor input capacitance (of max 20pf) to be the problem as I believe I would see similar delays in turn-on time in that case. Additionally, the RC time constant would be 0.3 microseconds (5RC = 1.5us) at the input.

What could be the problem?

Edit/Updated

Following the accepted answer, adding a reverse diode accross the base resistor solved the issue. The updated graphs can be found in the same document, under the Solved Trace sheet. For convenience, the updated image of the Collector and Clock graph is shown below:

Collector and Clock Resolved

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  • \$\begingroup\$ Can you add a picture of your test set-up focussing on the transistor and wiring to it. I suspect that in addition to miller effects you have "layout" issues. \$\endgroup\$ – Andy aka Jul 22 '18 at 11:23
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The main problem is likely to be Miller capacitance (internally 10 pf or so between collector and base) and the 15 kohm base drive resistor. CR time is going to be 150 ns due to that alone and will remain delivering current into the base for several CR times while the transistor is trying to turn off.

Try putting a reverse diode across the 15 kohm resistor such that when the input goes low it removes charge via the diode rather than through the sluggish 15 kohm.

I'd also consider using a potential divider at the base to deliver a lower impedance signal to the base. If you clock is 3.9 volts, potential divide down this to about 1 volt with a 4k7 across base and emitter to see what improvement that makes.

enter image description here

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    \$\begingroup\$ Shouldn't it be also due to the storage charge in the base that takes a small time to get collected in the collector? When you change Vbe to zero this charge takes a while to discharge so the collector current falls down a bit later. \$\endgroup\$ – dirac16 Jul 22 '18 at 10:31
  • \$\begingroup\$ @dirac16 yes it also depends on this but, the voltage gain of the circuit multiplies the miller capacitance effect to make it the dominant problem just like an op-amp has a very poor frequency response open-loop. \$\endgroup\$ – Andy aka Jul 22 '18 at 10:34
  • \$\begingroup\$ Thanks a lot! Adding the reverse diode solved the issue. The Collector and Clock graph with the addition of the reverse diode now looks like this. At first, I didn't think this would work because I thought that the voltage at the base was too low to make the diode conduct to remove the charge, but it did. Is the idea of the potential divider to make the base discharge through the lower impedance resistor (4k7) when the input goes low? I am a hobbyist and learning electronics on my own, this was great help. Thanks again :) \$\endgroup\$ – Kevin Jul 22 '18 at 11:24
  • \$\begingroup\$ Yes, that looks definitely better. The added resistor lowers the impedance at the base and might also be an alternative to the diode. \$\endgroup\$ – Andy aka Jul 22 '18 at 11:33
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    \$\begingroup\$ Switching transistor are generally specified with Ic/Ib=10 or 10% of hFE in practice, 2k for Rb works for better off times too and thus better symmetry T=~RC for Miller capacitance and base resistance to speed up Vbe. Adding small xx pF cap in parallel with the 2k speeds it up best by slightly exceeding the miller capacitance spec. \$\endgroup\$ – Tony Stewart Sunnyskyguy EE75 Jul 22 '18 at 12:28
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At 30 milliampere collector current (5 V / 220 ohms), the GM (transconductance is 1, and the 'reac' is 1/1 = 1, so the voltage gain is 220 / 1.

With voltage gain of 220, the input capacitance is 220 * 10 pf (if 10 pF is the Cob), or 2,200 pF.

The timeconstant of 15,000 ohms and 2,200 pF is nearly 40 microseconds.

One timeconstant is 63% change in voltage. We don't need a 63% change in base voltage to turn off the, but we do need a factor of 10? in collector current, which requires 58 millivolts delta-Vbaseemitter (at room temperature).

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