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My goal is to digitize an analog signal and measure the maximum pulse peaks via an ADC device. The signal has the frequency (pulse-repetition-rate) of f = 100 kHz. Furthermore, the analog signal consists of narrow pulses that exhibit pulse durations around ~30 ns. In addition, peak voltages of the pulses are not constant and change in time. Below, you can see the illustration of the signal:

(Note: Actually, pulses are not rectangular-shaped. They have the form of a Gaussian pulse.)

The problem is that comparing to the period of the signal, pulse durations are very short. So, I think that it is a real challenge to accurately capture the each pulse and detect their peak voltages via an ADC component. I don't know which ADC meet my requirements to detect pulse amplitudes, since I couldn't decide the required sampling rate and bandwidth of ADC.

I don't want to use GSPS-ADCs, since their prices are really high. Can I use kSPS range ADCs to detect pulse heights? (e.g. only one sample for one pulse) I think this method requires the accurate synchronization of ADC clock to analog signal, am I right?

Can you guys give me some design advice to chose a proper ADC to digitize such a signal?

Thanks in advance.

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    \$\begingroup\$ Have you considered using an op-amp based peak detector (e.g. analog.com/en/technical-articles/…)? \$\endgroup\$
    – Jules
    Jul 23, 2018 at 8:26
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    \$\begingroup\$ Well if that's the case then as Jules said go with a peak detector, have the reference voltage a little lower then your peak and you don't have to use an ADC \$\endgroup\$
    – Jack
    Jul 23, 2018 at 8:46
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    \$\begingroup\$ To simplify: You need to digitize the amplitude of the peak. You only need to digitize the peak value when a pulse is detected. Is that correct? \$\endgroup\$
    – JRE
    Jul 23, 2018 at 10:00
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    \$\begingroup\$ There are available GSPS ADCs that store to a short on-chip memory, and then can be read out at low speed, specifically for this sort of problem, like this for instance \$\endgroup\$
    – Neil_UK
    Jul 23, 2018 at 10:10
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    \$\begingroup\$ Your photo-detector might be able to charge a capacitor with its pulse current to a peak voltage - effectively a pulse integrator. A slower-speed ADC could infer pulse height from two samples: (before pulse, and after pulse). This would require each pulse shape to be identical. \$\endgroup\$
    – glen_geek
    Jul 23, 2018 at 10:31

3 Answers 3

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Can you low pass filter the pulses and measure the average?

Are you monitoring some sort of optical process (fluorescence, absorption)? You want to make your measurement not on a single pulse but on a whole load of them.

You can still do ratiometric measurements on the average of pulses.

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  • \$\begingroup\$ Thanks for the answer. Actually, I want to measure the peak heights of each pulse individually and digitize each of them to use in a computer-based process. So, I think the filter+averaging method can't give me the exact amplitudes of each pulse, am I wrong? \$\endgroup\$
    – partheniusx
    Jul 24, 2018 at 7:00
  • \$\begingroup\$ I think that you want to maximize the SNR. (There are applications where you do need the exact amplitude for each pulse but if you end up averaging them up in software then do it in hardware.) Do the analysis - if you digitize each pulse your BW has increased and the cost of the ADC has increased. \$\endgroup\$
    – D Duck
    Jul 24, 2018 at 7:56
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Consider this

schematic

simulate this circuit – Schematic created using CircuitLab

Use a Schottky diode HP5082-2514 ??? 100 picosecond turnon/off time

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  • \$\begingroup\$ Thanks for the response. I'm going to analyze this setup in a simulation environment. By the way, what is the operational name of this circuit? (I mean, is it a peak detector or something else?) \$\endgroup\$
    – partheniusx
    Jul 24, 2018 at 7:37
  • \$\begingroup\$ Sorry, I didn't see the label at the output of the circuit. It is a sample and hold circuit. \$\endgroup\$
    – partheniusx
    Jul 24, 2018 at 7:40
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Ok. It is perhaps too late for the OP, but for some new users, it can be useful.

Here is an example of what can be done in "similar" conditions ...
NB: of course, devices must be "adapted" to the needed speed (delay line, PDL monostable, comparator, ...).
Property of delay line (when "Load open") is used to double the voltage at the sampler input.
Line delay "time" is big, only to show the principle, but it must be used to synchronize signal delayed with pulse sampler (Pd).

enter image description here

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