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Note

I turned my answer into something of a collection of free impedance calculators..


I was thinking of using one of the most ubiquitous connectors in the world - 2.54mm pin header. The snag here is that I need to push a relatively high frequency over it 4MHz UART, edge frequency much higher of course.


Update

4Mbit UART is just the tip of the iceberg, if I decide a standard header is fine for RF, there's SPI, SDIO, RGMII, 900MHz RF link antenna connection.. At some point it certainly stops being fine.


Update2

With regards to signal integrity and EMI, fundamental frequency is fairly meaningless, see this EDN article about what's the spread of RF energy on a 1MHz signal with 0.1ns rise time. An extreme example but 1ns rise time is fairly normal. https://www.edn.com/design/pc-board/4430165/Getting-EMC-design-right---First-time--Part-3--High-speed-signals---Impedance

What is a safe margin for trace length vs rise time depends on who you ask, you get full reflection if round trip delay is equal or higher than the rise time. Some people suggest 1/3rd is a decent margin while others go as far as to 1/10th.

On a standard FR4, 1ns propagation time equals to approximately 160mm, so 80mm trace would be "critical length". With 1/3rd rule, ~25mm would be fine.

Here is an analysis of the 1/3rd rule, which may not be good enough for 15R drive impedance: https://blogs.mentor.com/hyperblog/blog/tag/critical-length/

enter image description here

You'd think that such a popular connector would have ready reference on the impedance of it. This does not seem to be the case however. 1.27mm ribbon cable has ~100R impedance in GSG configuration but it's not quite the same as 2.54x2.54 2-row connector.

I'd use the connector like this:

GSGSG
SGSGS

So each signal is surrounded by ground pins in three directions, essentially making it a co-planar wave-guide. Now CPW calculators are around, but I'm not quite confident they can handle the case where trace width and thickness are the same. In fact majority of the calculators dismiss the trace thickness out of hand. enter image description here

Now I used this CPW calculator http://wcalc.sourceforge.net and plugged in these values:

  • width = 0.6mm
  • s=1.94mm
  • length=10mm
  • Thickness=0.6mm
  • Surface roughness=1µm
  • substrate thickness=1.94mm
  • Dielectric constant=3.4

0.6mm width comes from typical header post size, it varies a bit from manufacturer to manufacturer, 0.64mm is another popular choice. 3.4 is polyamide dielectric constant.

It spits out 119.5 R as a result. Fair enough, but is that realistic? Any thoughts on this? Removing the ground plane REDUCES the impedance to 72R, which would imply the calculation can't handle thick traces + ground planes. In fact it seems to ignore the trace thickness entirely if there's a "ground plane".

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  • 1
    \$\begingroup\$ As you've seen in your post, the impedance of this connector depends on where your signals are in the connector, which is likely why the datasheet doesn't specify an impedance. \$\endgroup\$ – C_Elegans Jul 23 '18 at 12:53
  • \$\begingroup\$ Yeah, sure, but for example ribbon cables are defined on a couple of different patterns, GSGS or GSSG. I'm sure someone with a field analysis software must have figured this out, given how the 2.54mm header is everywhere. But at least I can't make google spit it out. \$\endgroup\$ – Barleyman Jul 23 '18 at 13:20
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    \$\begingroup\$ As pointed out, USB 2.0 HS uses these headers so the impedance analysis must exist. Perhaps in USB-IF literature. \$\endgroup\$ – Barleyman Jul 23 '18 at 14:53
  • \$\begingroup\$ GSSG is used for differential signaling in ribbon cables, while GSGS is for single-ended. The impedance can further be altered by gluing a copper foil, on one or both sides. However, the dielectric insulation on ribbon cables are not exactly the RF-grade material, so insertion losses pile up with length. \$\endgroup\$ – Ale..chenski Jul 23 '18 at 15:34
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    \$\begingroup\$ 4 MHz is simply not a relatively high frequency in this context. \$\endgroup\$ – Olin Lathrop Jul 24 '18 at 11:30
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You are overthinking this issue. For 4 MHz you shouldn't have any concerns. For example, all PC mainboards use 2x5 headers for on-board USB 2.0 connections to front panel USB, and they operate at 240 MHz quite happily, on billions of PC. Although the 0.100" headers were never intended for RF interconnect and therefore are rarely characterized electrically.

Trace thickness does have a minuscule effect on trace impedance, which can be easily determined using any on-line Java microstrip calculators. Most calculators assume standard 1.5 Oz copper thickness, which always fall within the margins of error.

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  • \$\begingroup\$ It might as well as be 25MHz SPI and this thing needs to pass EMI compliance on a plastic box. "trace" thickness is not nothing if the pin is a square.. \$\endgroup\$ – Barleyman Jul 23 '18 at 13:10
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    \$\begingroup\$ @Barleyman, you are not taking into consideration that total length of transmission line along the connector is just 6-7mm long. At 25 MHz the signal wavelength is maybe 40 cm, so the influence of connector imperfection on the signal nears to about zero. And you can't use microstrip calculators to model 3-D connectors, you need a special software for this. \$\endgroup\$ – Ale..chenski Jul 23 '18 at 13:24
  • \$\begingroup\$ Yeah, But you'd think someone with field analyzer software would have figured this out ages ago. Anyways, 25MHz SPI bus has 40ns cycle time so you'd probably look at max 2ns rise-fall time, pushing effective frequency to 125MHz right there. I have also need for RGMII connectivity but I was planning on giving up on header right away with that and using pcie 1x or micro-pcie instead. \$\endgroup\$ – Barleyman Jul 23 '18 at 13:36
  • \$\begingroup\$ With regards to USB 2.0 HS, it's an excellent point. I'm absolutely sure the analysis on that connector has been done and found adequate. Of course on the USB header data pairs sit next to each other which is not really optimal crosstalk or impedance-wise. \$\endgroup\$ – Barleyman Jul 23 '18 at 13:38
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    \$\begingroup\$ @Barleyman, you don't need a 3-D field analyzer to figure out that a 6-mm trace imperfection has no [significant] effect on 25-MHz signal, yet on 4 MHz signal. USB 2.0 signal has 500 ps edge rate, so it is in 1-GHz area, yet it operates just fine, as I informed you. There are also 2-mm rectangular headers that are used for USB 3.0 5Gbps signaling, and 1.25/1.27 mm headers that are smaller and can be used for this range with 0.025" flat ribbon cables. \$\endgroup\$ – Ale..chenski Jul 23 '18 at 13:42
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To solve this, you need at more serious software than your standard PCB trace analyzer. I found a free tool to do this, MMTL electromagnetics simulator, it uses method of moments. MMTL stands for "Multilayer Multiconductor Transmission Line". It's available in sourceforge TNT 1.2.

There are also many commercial packages to do this, from more sophisticated 2D tools like trace analyzer (uses Green's formulas) to full blown 3D field analyzers like Sonnet and EM3DS.

Trace Analyzer free license allows max 2 traces. It can do ground traces so it allows this kind of GSGS header pattern. (in paid version)

Sonnet has Lite version that's actually relatively useful, it allows 2 metal layers and 3 dielectric layers. You're limited to 32MB of RAM after registration but there are tips on how to optimize memory usage. Sonnet is actually 2.5D which disregards metal layer thickness. Vias are modelled however.

EM3DS free license does not allow professional use, it's restricted to 2 metal layers, 3 dielectric layers. This has 2.5D mode with zero height metal layers and full 3D mode where your metal layers can be arbitrary thickness.

Long story short, surrounding a single 0.64mm pin with five GND pins spits out 69R. That's actually not too bad. Three pins works out to 70R which makes me wonder how accurate the analysis is.

UPDATE

Since this is something of a repo for impedance calculators I can find, let's put ATLC and Multiple Dielectric Transmission Line Calculator here. MDTLC is a front end for ATLC. ATLC works with a bitmap you can draw with gimp for an arbitrary 2D shape, ALTC does number-crunching 2D field analysis, not a simplification so it should be able to handle whatever shape you decide to throw at it. MDTLC lets you create automagically bitmap for differential pair or CPWG, works in mils.

NOTE MDTLC is not using the latest atcl, you may want to use it just to generate the bitmap to feed to atlc. Atlc Windows binary you get by default from sourcefodge is ancient, you probably want to build from source if you go there. Here's instructions for windows: http://axotron.se/blog/installing-atlc-on-windows/

Note that he doesn't know about "tar", so tar -vxjf atl-file-bz2 works just fine to extract the tarball.

With the colours MDTLC uses, this works: atlc -v -d c8c865=4.3 -d00af1f=3.5 -dfffffe=1 test7.bmp

Obviously you should change the dielectric constant to whatever you're using, 00af1f is the solder resist.

enter image description here

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  • \$\begingroup\$ This is a fairly useful self-answer, +1. If you really want to know the limits of a 2-row 0.1" header, you should re-formulate your question and remove any mentioning of UART. The result will obviously depend on PCB fanout/stackup, and the method of wire attachment to female header, IPC or wire crimps. The final goal is to have a good point-to-point link, not a connector alone, so the cable must be a good part. For more advanced connector a good manufacturer would offer test PCB, but rarely have data for cable connection. For me it always was a challenge to get these data out of manufacturer. \$\endgroup\$ – Ale..chenski Jul 24 '18 at 18:05
  • \$\begingroup\$ @AliChen Controlled impedance on PCB traces is easy enough to pull off if you know what you're doing. Signal integrity-wise it seems you could even push 300MHz DDR3 routing over the standard header fairly safely but I do worry over the EMI considering it's inside a unshielded plastic box. See here for example, 1/10th wavelength is considered problematic already. ti.com/lit/an/szza009/szza009.pdf . Unless the microcontroller drive output strength is adjustable, it's probably designed to meet highest supported single ended switching speed. \$\endgroup\$ – Barleyman Jul 25 '18 at 9:02
  • \$\begingroup\$ @AliChen If the MMTL software is correct, main problem of high frequencies standard 0.1" connector is the mismatch of ~100R for the ribbon cable (depends on materials) and ~70R for the IDC connector. 0.635 half pitch ribbon cable has 75-80R depending on materials and is used for ATA/133 for example. It'd actually imply that industry is happy to push 67MHz single ended signal over unshielded ribbon cable in GSGS configuration. That's connected to a 2.54mm header but obviously the connector is hardly standard IDC type. Naturally the 80-pin ATA GSGS deal has more to do with crosstalk.. \$\endgroup\$ – Barleyman Jul 25 '18 at 15:16
  • \$\begingroup\$ You are not taking into account in your models that there is a female mating connector over the pins, and conductor shapes/sizes are different for different IDC sockets. You need a much better 3D modeler so solve the problem (which isn't a problem in first place). \$\endgroup\$ – Ale..chenski Aug 2 '18 at 18:35
  • \$\begingroup\$ Since it's not a problem, I'll just put that HSIC over that connector and pass EMI like a champ. \$\endgroup\$ – Barleyman Aug 3 '18 at 8:30

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