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I am pretty new to SMPS circuits. I understand there's a bleeder resistor, a flyback diode circuit to power the transistorized osc circuit. I guess that the current around the MOSFET will be like a pulse train.
Q1: What is the role of R1, D1 & C1? Is it a buck converter? Does D1 ensures biasing to R1 is not disturbed?
Q2: What role does R2 play? Restrict current to the MOSFET and biasing?
Q3: Does C2 block the biased DC voltage from entering the fly-back circuit?
Q1 What is the role of R1, D1 & C1? Is it a buck converter? Does D1 ensures biasing to R1 is not disturbed?
It's a flyback converter and R1, D1 and C1 are there to catch unusable energy when the MOSFET opens. The unusable energy is because only about 95% of the magnetic energy is usable in the secondary. Without those components there would be a sizable back emf and more than likely, the MOSFET would smoke on over-voltage.
Q2 What role does R2 play ? Restrict current to the MOSFET and biasing?
When the MOSFET turns on, current ramps up through the transformer primary and can hit saturation limits if this isn't taken care of. The voltage across R2 starts to turn on the NPN transistor when current is hitting the allowable limit and this mechanism stops current rising any more.
Q3 Does C2 block the biased DC voltage from entering the fly-back ckt?
This is a bit trickier to figure out. Bear with me...
I believe it turns the MOSFET off rapidly - the tertiary winding is rectified by the BA159 diode and smoothing is performed by the 47 uF capacitor on the "dot" pin of the tertiary. This sets a smooth positive voltage across the 47 uF capacitor and this largely remains so while the SMPS is running. However, when the MOSFET starts to turn-off that tertiary winding will reverse the voltage across it and rapidly pull down the bias to the MOSFET via C2.
It’s not a buck converter, it’s a flyback.
R1, C1 and D1 compose the snubber circuit to capture and burn off the energy stored in the leakage inductance of the transformer.
R2 is the current sense resistor. It does not by itself limit any current but the IC will detect overcurrent via it and limit the duty cycle.
C2 is not entirely clear but probably bias supply for the IC and/or dV/dt protection.
EDIT: No PWM IC but rather self oscillating and self-resetting so C2 may supply the gate with voltage to turn it on. Need to simulate to tell for sure how it’s operating.
