constant <clock>_period : time := 10 ns;
What is the error with this code ? it says syntax error near "<".
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1\$\begingroup\$ Using google I'd say: constant clk_period : time := 10 ns; would be correct \$\endgroup\$– Alexander von WernherrJul 27, 2018 at 8:49
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1\$\begingroup\$ Why do you have the “<“ and “>”? \$\endgroup\$– Blair FonvilleJul 27, 2018 at 8:52
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2 Answers
\$\begingroup\$
\$\endgroup\$
I think you generated a testbench-template in Vivado or ISE, as these programs generate code like this.
The idea is that you replace the <clock> with the name of your clock-signal: If your clock-signal is called clk, the line would become
constant clk_period : time := 10 ns;
which is perfectly fine.
\$\begingroup\$
\$\endgroup\$
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VHDL names can contain the following:
- letters
- numbers
- underscores
They are also case insensitive, have to start with a letter and cannot contain two adjacent underscores (From the Doulos Golden Reference Guide).
< and > are not a letter, number or an underscore.
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\$\begingroup\$ Names are a larger subject, see IEEE Std 1076-2008 8. Names. You're describing a basic identifier, a lexical element see 15.4.2. There's also the extended identifier (15.4.3).
extended_identifier ::= \ graphic_character { graphic_character } \where a backslash can be represented in the sequence of graphic characters by escaping it with a preceding backslash.constant \<clock>_period\ : time := 10 ns;would be a legal declaration with the object name\<clock>_period\. \$\endgroup\$– user8352Jul 27, 2018 at 23:11