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I have a hardware structure (described in logic diagram consisting of adders and multipliers) that is extremely regular, i.e., one small hardware is repeated again and again in the structure with regular pattern of interconnects. for example, see the schematic below.

Image 1

The hardware on the right is formed using multiple copies of the small hardware element on the left. Now, suppose I have another structure that has the same number of Z-elements (in the above example image) but it doesn't follow any regular pattern of interconnects between different layers, i.e., the interconnections between Layer 1 and 2 are random. My question is which of these hardware will be better (in terms of power efficiency, area or any other respect) or they will both be identical in terms of performance (power, area etc.) ? Please answer both with an FPGA- and ASIC-based implementation platform in mind. Any references are appreciated.

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  • \$\begingroup\$ This is so incredibly vague I don't know where to even start. \$\endgroup\$
    – Matt Young
    Aug 25, 2012 at 19:51
  • \$\begingroup\$ Can you post a schematic ??? for booth circuits & describe it more ?? Arrange your question ??? \$\endgroup\$
    – xsari3x
    Aug 25, 2012 at 19:55
  • \$\begingroup\$ @xsari3x schematic added. \$\endgroup\$
    – ubaabd
    Aug 25, 2012 at 20:53
  • \$\begingroup\$ All I can say is "Huh?". \$\endgroup\$ Aug 25, 2012 at 20:59
  • \$\begingroup\$ @OlinLathrop May I know which part of the question I was unable to explain? I don't belong to hardware domain and wanted to know if given some hardware resources, a hardware structure that is regular can be regarded as better than a hardware structure that is irregular even if they use the same hardware resources, i.e., the same number of adders and multipliers. May be I am not using the correct terminology so I would appreciate any help. \$\endgroup\$
    – ubaabd
    Aug 25, 2012 at 21:08

1 Answer 1

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You can find the answer yourself by synthesizing the two circuits and comparing the results. Everything depends on the exact circuit, the synthesis tool, P&R tools and the target technology.

It is dangerous to generalize performance (or ask others to predict your performance) based on vague input.

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  • \$\begingroup\$ I thought it would be straight forward that regularity in the structure will 'ALWAYS' be a good thing. I actually belong to algorithm design domain so not good at hardware simulations. I was just wondering if I produce regularity in the structure (by tweaking the algorithm), can I claim without going into further details that it is a better way considering I use the same resources. I guess its not that simple given your input. Thanks for the answer by the way. \$\endgroup\$
    – ubaabd
    Aug 26, 2012 at 11:07
  • \$\begingroup\$ Yeah, it is not that straightforward. If you are developing algorithms, the best way is to do a lot of experiments with a hardware synthesizer. There are some "rules of thumb" around, but many of them have been outdated with the increase quality of synthesizers. Use the scientific method: hypothesis -> experiment -> evaluation. \$\endgroup\$
    – Philippe
    Aug 26, 2012 at 15:22

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