I'm running into a weird bug. Part of me thinks that it's LTSpice that's wrong, but that seems unlikely. I'm working on the circuit below, to be able to switch between feeding my voltage regulator from two different sources.
When I run this in my sim software (LTSpice), I see that VSources is 2.2V, but RegIn (the output of my two PMOS transistors) is ~50mV. This is with power source 1 (coming in from the top) floating, and power source 2 (coming in from the bottom right) at 3.3V. The GND at the very bottom is to simulate pulling a GPIO pin low to "open" the mosfet gates.
So I have Vgs = -2.2V, but the gates still appear to be closed. At first I thought that this was because of a high Vth on the mosfets, but I tested another pmos by isolating it and trying different voltage values on the Source input while pulling Gate low and probing Drain, and even Vgs values as low as 1V opened the gate enough to let voltage through to the drain.
So my core question: why are my pmos gates not opening even though Vgs=-2.2?