0
\$\begingroup\$

I'm running into a weird bug. Part of me thinks that it's LTSpice that's wrong, but that seems unlikely. I'm working on the circuit below, to be able to switch between feeding my voltage regulator from two different sources.

Voltage Regulator - double fed

When I run this in my sim software (LTSpice), I see that VSources is 2.2V, but RegIn (the output of my two PMOS transistors) is ~50mV. This is with power source 1 (coming in from the top) floating, and power source 2 (coming in from the bottom right) at 3.3V. The GND at the very bottom is to simulate pulling a GPIO pin low to "open" the mosfet gates.

So I have Vgs = -2.2V, but the gates still appear to be closed. At first I thought that this was because of a high Vth on the mosfets, but I tested another pmos by isolating it and trying different voltage values on the Source input while pulling Gate low and probing Drain, and even Vgs values as low as 1V opened the gate enough to let voltage through to the drain.

So my core question: why are my pmos gates not opening even though Vgs=-2.2?

\$\endgroup\$
  • 2
    \$\begingroup\$ Did you really take a photo of the screen instead of exporting a proper schematic? Are you sure you have the source/drain connections right? \$\endgroup\$ – Elliot Alderson Jul 30 '18 at 23:55
  • \$\begingroup\$ What is worst-case Vgs(th) for your MOSFETs? 2.2 volts seems mighty low for proper operation - even for some logic-level FETs. \$\endgroup\$ – WhatRoughBeast Jul 31 '18 at 1:07
  • \$\begingroup\$ The picture wasn't intended to be posted, but it was the only thing I had on hand. Judging from the way the FETs are depicted, the source/drain connections are right. And yeah, I had the same thought about Vgs being too small, but I got the same pmos working with Vgs as small as -1.0V, so I don't think that's it. Although it's possible I messed up the test. \$\endgroup\$ – macinblack Jul 31 '18 at 2:26
  • 2
    \$\begingroup\$ Why do you have 5 diodes,no part numbers and incomplete measurements. \$\endgroup\$ – Sunnyskyguy EE75 Jul 31 '18 at 3:53
  • 1
    \$\begingroup\$ Using the default D for diodes is fine, usually, but not the MOSFETs. You should really use a readily available model for them, or one of your own (or subcircuit). Also, I agree with the screen capture, or take a picture of the whole schematic, such that it can be seen. \$\endgroup\$ – a concerned citizen Jul 31 '18 at 6:00
0
\$\begingroup\$

why are my pmos gates not opening even though Vgs=-2.2?

They are opening, but you have selected the default PMOSFET which is very weak. here is a plot of ID vs. VDS with VGS = 2.2V. The FET is saturated at only 50uA.

Default PMOS ID vs Vds LTspice FET curve tracer

To switch higher current you need a FET which has much lower RDSon so it stays in the 'linear' region. Right-click on the PMOS symbol and pick a New MOSFET with appropriate parameters, eg.:-

enter image description here

The SI4463DY drops less than 0.1V at 5A, so it should easily handle the maximum expected load current in your circuit.

\$\endgroup\$

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.