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I am currently trying to better understand microcontroller-architectures and I am particularly studying the ARM cortex-m3 right now. What I have always wondered is, if memory mapped registers are actually implemented by some kind of bistable circuitry like e.g. general purpose registers are? So by memory mapped registers I mean e.g. the ones contained in the System Control Block of the cortex-m3.

Also is there a difference considering the configuration registers of the core itself vs. control registers of peripherals that the manufacturer adds to the die? Additionally sometimes the configuration / communication memory that can be addressed by bus-systems like i2c or modbus is referred to as registers, are these also actual registers?

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Almost all registers are implement as so called D-Flip-Flop.

The ones in the System Control Block as well as the ones that make up the peripherals, timers, infrastructure etc.

Some "register blocks" are implemented as synchronous memory. This is the case if you need the result of one or maximum two at a time.
If you need to read only one of many registers they use single ported synchronous memories.
If you need to read maximum two of many registers they use dual ported synchronous memories.

configuration / communication memory that can be addressed by bus-systems like i2c or modbus is referred to as registers, are these also actual registers?

To 'store' (or write) a few bits, a register is the most suited structure. Only if you have many, many bits one tends to use memories of the various kinds, SRAM, EEPROM, FLASH, DDR.
If we talk about 'status' registers you get into less defined territory. e.g. A 'data available bit' can come from comparing a FIFO level with zero. But an 'overflow' is likely a real register which gets set when data arrives with a full FIFO.

are actually implemented by some kind of bistable circuitry like e.g. general purpose registers are?

I assume you mean with a "bistable circuit" a set-reset flipflop. or some other configuration with cross-connected NAND or NOR gates.
The answer is NO.

Registers are implemented as a pair of front-to-back connected inverters: Transmission Gate based D Flip Flop. This link has great pictures of how they work. These are used for nearly all registers, also for what you call "general purpose" registers. In fact in a chip there are no "general purpose registers". All registers are equal.

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  • \$\begingroup\$ +1 but I think that the "remote" register sentence might be a bit confusing to future readers. Just because the datasheet of an e.g. I²C-connected IC defines registers that can be written to or read from, doesn't mean that these registers are actually represented by some kind of memory at all - after all, it's totally up to the IC (and potentially firmware controlling its I²C interface) to react however they damn well please to any combination of bits coming from the master. \$\endgroup\$ – Marcus Müller Aug 5 '18 at 9:51
  • \$\begingroup\$ I'll remove/re-write that part \$\endgroup\$ – Oldfart Aug 5 '18 at 11:06
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Back in the Good Old Days some "memory mapped registers" were actually located in off-chip memory. A bad idea as it turned out because of bandwidth problems as CPUs became much faster than bulk memory. The TI 9900 did it this way The actual implementation in electronics would be conventional SRAM or DRAM

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    \$\begingroup\$ It was a problem even at the time - for example in order to sufficiently support those registers the TI99/4, a micro computer based on the TMS9900, had to have two distinct banks of memory with different speeds: 16K of standard DRAM for bulk storage and 256 bytes of fast SRAM. This added complexity probably contributed to the fact that the machine couldn't compete in the competitive early 80s micro marketplace, and TIs subsequent withdrawal from computer manufacturing. \$\endgroup\$ – Jules Aug 5 '18 at 13:31

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