# Simple diode question

I have the following doubts about a p-n junction diode:

1) If we short the diode ( connect it's terminals together without any power source) then how is the Kirchoff's law across the loop satisfied?

2) If the diode is forward bias, people say that the built in voltage Vin decreases by V. That is the new built in voltage is Vin-V. But what I don't get is shouldnt the voltage across the diode be V? How does a Kirchoff's voltage equation across the circuit look like?

3) Similarly, in reverse bias why does the applied voltage V add to the built in voltage? Shouldn't the voltage across the diode be V in the opposite direction? How does a Kirchoff's equation for this circuit look like?

Any help would be appreciated. Thanks :)

• Your confusion comes from the idea the forward voltage is a constant. It isn't. This is a simplification for (relative) high currents. As soon you get into the µA range, the forward voltage drops to µV. At zero current, it is zero. – Janka Aug 7 '18 at 2:40
• I still don't understand. – pranav Aug 7 '18 at 2:59
• I think the questioner is asking about the "built-in voltage" which is a device physics thing, not the forward voltage. It's been years since I learned how diodes work so I can't give a great answer. It's something like "the built-in voltage is balanced by an equal and opposite voltage at the metal contacts" so that there is no current, and no way to measure the voltage. – Matt Aug 7 '18 at 3:21
• @Matt You posted this comment just before I finished typing up my answer. Please note, I'm a different Matt. – Matt Aug 7 '18 at 3:25

1) If you short a diode (in the dark) you will have 0 current through everything, KCL is satisfied. The KVL equation looks something like $0 = V_{bi,m1} + V_{bi,pn} + V_{bi,m2}$ with one or two of those variables being negative which allows KVL to be satisfied.
2) If you forward bias a diode the built in voltage increases by the applied bias... sort of. This is technically going to be spread across all 3 junctions, but the vast majority should show up across the semiconductor p-n junction, so its fine to assume thats where it all is. KVL equation: $-V_{ext} = V_{bi,m1} + (V_{bi,pn} - V_{ext}) + V_{bi,m2}$
3) Basically the same as #2 but with a positive voltage: $V_{ext} = V_{bi,m1} + (V_{bi,pn} + V_{ext}) + V_{bi,m2}$