Thanks for the advice regarding the different peripheral bus options. I re-read my original post and I realized I left out a critical piece of information. My apologies. The ADC is pulling data from an image sensor at 28MHz and an image is being taken about once every 30 seconds. Meaning once data is stored, it can be transferred out at a slower rate. My original hope was to connect the RAM bus to the SBC so that I wouldn't have to re-copy the data to the SBC, but this is looking like it might not be possible with a cheaper board.
If this is the case, I think a DMA interface is not the best way to go.
If you only need to pull the contents of the DRAM every 30 seconds, you have a LOT more flexibility.
I think the cheapest, easiest way to go would just be to slap a Raspberry Pi in there. Tie it into the FPGA through a SPI interface (there is a hardware SPI connection brought out in the GPIO of the PI), and with a clock rate of a few megahertz, you should have plenty of time to read out your image data.
Now, assuming you're building the FPGA interface in-house, and don't mind making some modifications, I would suggest re-designing the FPGA board with a Xilinx Zynq microprocessor.
The Zynq 7000 family incorporates an extensible processing platform into devices to address high-end embedded-system applications, such as video surveillance, automotive-driver assistance, next-generation wireless, and factory automation. Zync-7000 FPGAs integrate a complete ARM Cortex-A9 MPCore-processor-based 28 nm system. The Zynq architecture differs from previous marriages of programmable logic and embedded processors by moving from an FPGA-centric platform to a processor-centric model.For software developers, Zynq FPGAs appear the same as a standard, fully featured ARM processor-based system-on-chip (SOC) that boots immediately at power-up and can run a variety of operating systems independently of the programmable logic.
Basically, you use the FPGA fabric to read-out your image sensor, and then make it available to the CPU over a local DMA channel. All in the same IC.
There is a dev-kit you could do testing with called the ZedBoard.