Power stage for VCR (Voltage Controlled Resistor)

Question

I'm building a VCR (Voltage Controlled Resistor) using the LM13700 component. You can read more details on that here:

Floating voltage-controlled resistor with LM13700: How does it work?

The problem I'm facing is its severe current constraints: below 1 mA ^(*). Therefore, I'm building my own "output stage" for the VCR.

_{(*) Note: The output current of the darlingtons in the LM13700 is up to 20mA. However, it is the output of the OTA's (Operational Transconductance Amplifier) that define the current capabilities of the VCR (Voltage Controlled Resistor) circuit.}

 

1.  The circuit

I've designed the following circuit to create a more powerful (read: more current capable) output stage for my VCR:

Let us analyse the circuit. Note that the circuit behaves differently for V_IN1 > V_IN2 versus V_IN2 > V_IN1. So we'll handle both situations.

 

1.1  V_IN1 > V_IN2

Thanks to the schottky diodes D₁ and D₂, only the mosfet on the left T₁ can conduct current if V_IN1 > V_IN2.

The positive input of the opamp V_IN+ is the result of a resistive division. The higher the voltage difference ΔV_IN on the terminals, the higher V_IN+ rises. We want the current I₂ (going through the mosfet) to rise accordingly. Will that happen?
If I₂ is "too low", the feedback to the negative input of the opamp V_IN- is lower than V_IN+, causing the opamp output to increase. This makes mosfet T₁ more conductive (gate rises), so I₂ goes up. This keeps happening until V_IN- reaches the level of V_IN+.

I've made following calculations:

From which we can deduct that:

We have proven here a linear relation between ΔV_IN and I₂. Sure, that's not the only current flowing between the terminals. But we assume that I₂ >> I₁, such that:

The green box encircles the total (perceived) resistance from one terminal to the other.

 

1.2  V_IN2 > V_IN1

The currents I₁ and I₂ now flow in the opposite direction. Only mosfet T₂ on the right can conduct (thanks to the schottky's).

The positive input of the opamp V_IN+ is of course still the result of a resistive division. But this time its value goes down with increasing ΔV_IN. Well, at least if you keep V_IN2 fixed and only pull at V_IN1 to increase the differential ΔV_IN.
For the feedback to work correctly, we hope that I₂ increases in magnitude as ΔV_IN grows. Does that happen?

Yes, it does. As V_IN+ decreases, it slides below the value of V_IN-. The opamp output takes a dive. The PMOS T₂ gains more V_SG voltage and consequently conducts more. Beware, this PMOS is upside down, so perhaps you've got to turn your head to see that happening.

In short, we've intuitively deducted a linear relationship ΔV_IN ∼ I₂.

I've also calculated this relationship, and I get the exact same value for R_TOT as before, namely:

 

1.3  Resistive value

Let us choose some decent values for R₁ and R_C:

R₁ = 20kΩ
R_C = 100Ω

With these values, plotting R_TOT against R_VCR gives:

 
Let us now plot R_TOT against the control voltage V_CONTROL that drives the VCR resistance on the left. I'm using a VCR circuit based on the LM13700, as explained here: Floating voltage-controlled resistor with LM13700: How does it work? Based on those formulas relating V_CONTROL to R_VCR combined with the previous formula relating R_VCR to R_TOT, I get:

 

1.4  Notes

Perhaps you've noted the resistors R_A and R_B around the mosfets. The purpose of R_A is to protect the output of the opamp. Opamps don't like capacitive loads that much - depending on one type to another of course.
Mosfets have a "linear region" in which they act as a resistor. However, if you drive the gate just a little too high, you risk to leave that region in an instant. I know that the feedback mechanism should prevent this from happening. But I thought: let's give those opamps some margin. It doesn't hurt to increase artificially that linear region with the resistive divider R_A and R_B.

 

1.5  Components

These are the parts I'm going to use:

• OPAMP  →  LTC6090 (Digikey: `LTC6090HS8E-5#PBF-ND‎`)
• NMOS   →  IRF740 (Digikey: `IRF740LCPBF-ND‎`)
                      or STP3LN80K5 (Digikey: `497-17293-ND`)
• PMOS   →  IRF6218 (Digikey: ` IRF6218PBF-ND‎`)
                      or FQP3P20 (Digikey: `FQP3P20-ND`)
• Schottky  →  BAT46 (Digikey: `BAT46-TR`) _{Note: Some in parallel for higher current}

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2.  Increase the range

The example in the previous paragraph provided a range from 100Ω to 140Ω. Not so spectacular. This low-range problem has to do with the resistive division at R₁ and R_VCR. Even tuning their values doesn't really solve the low-range problem (I believe).

I've introduced an instrumentation amplifier to solve the problem:

According to my calculations, the relation R_TOT ∼ R_VCR is now:

with G the gain of the amplifier set by resistor R_G. This gain can range from 1 to 1000.

 

2.1  R_TOT plotted against V_CONTROL

We'll choose the same values for R₁ and R_C as before:

R₁ = 20kΩ
R_C = 100Ω

For now, we keep the gain at G = 1. This is now R_TOT in function of the control voltage:

You can see a big range on the resistance value: from 100Ω to 225Ω. The range almost doubled, and we didn't even use the potential offered by the gain factor in the instrumentation amplifier.

 

2.2  Using the potential of the gain

Using the "potential offered by the gain factor" from the instrumentation amplifier could intuitively extend the range. However, that is not really the case.

Let us increase the gain a little to G = 1.5. This is what we get:

Just applying the formula would gives the dashed lines. But they are not representative anymore once R_TOT dives under the value of R_C. R_TOT can never go below that resistance.

The range doesn't extend. Instead, it shifts downwards and gets tighter. So we have to keep the gain G = 1!

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3.  My question

I've got a couple of questions concerning this circuit:

• Is the way I'm using the PMOS okay? It's upside down...
• Do you see another option (instead of inserting an instrumentation amplifier) to increase the range of R_TOT?
• Do you see any other issues in the circuit?

I'm going to build the circuit in a few days on a PCB, and would like to catch errors early before spending a lot.

Answer 1

Is the upside down PMOS okay?

Yes, it act as a reverse-polarity "diode": https://electronics.stackexchange.com/a/525249/59133

Another option (instead of inserting an instrumentation amplifier) to increase the range of RTOT?

I don't see a biasing method that you haven't already graphed and explored.

Any other issues in the circuit?

You tell us. I'm assuming you built the circuit in the few days since you said, and it's been almost three years since.