Non-inverting op-amp configuration with capacitor

Question

I don't really get what is the purpose of the capacitor C1 which is connected in parallel with the feedback resistor. After my knowledge, if we modify the input signal frequency the over all gain will modify accordingly because of the impedance of the capacitor which effects the feedback resistence.

A lot of times I hear that it's useful for stability but I don't get why and how to calculate its value. Is it related to the fact that after a certain frequency the op-amp can cause lagging phase shifts and the capacitor prevents this? If so, why is that?

Thanks in advance.

Answer 1

A lot of times I hear that it's useful for stability but I don't get why and how to calculate it's value.

Consider that the non-inverting pin might have a parasitic capacitance of maybe 4 pF. That's the pin itself, the resistor parasites and any copper capacitance all lumped together.

That 4 pF is in parallel with the 10 kohm resistor and its presence will start to increase circuit gain at about 3.98 MHz. If you have a slow op-amp that isn't expected to run at close to that frequency then don't worry about it; you don't need to consider adding a feedback capacitor either but, if you have a fast op-amp and you expect decent flat performance beyond several MHz, then that's the time to worry about calculating the capacitor in parallel with your 91 kohm.

Your capacitive reactance needs to be in balance with the resistor it is across hence, for a 91 kohm (and assuming 4 pF at the input across the 10 kohm) you would consider a capacitor of value 4 pF x 10/91 = 0.439 pF.

Alternatively you might lower the resistance values by 10 and push the problem away from the low MHz to the tens of MHz at which point your op-amp may have run out of steam. If it hasn't ran out of steam then you might pick a suitable feedback capacitor.

Answer 2

Just to add a bit to Andy's answer (a mathematical approach). In order to understand why, you need to be familiar with the frequency response. An opamp has input and stray capacitance on the inputs, which reduces the closed-loop bandwidth, as stated in the answer.

^{simulate this circuit – Schematic created using CircuitLab}

Without going into the math, you can find the loop gain (which you'd use to find gain and phase margin for stability purposes), and it turns out to be:

$$\text{Loop Gain}=A_{ol}\dfrac{R_1}{R_1+R_F}\dfrac{1}{\frac{s}{\omega_p}+1} $$

Now, the opamp open loop gain, \$A_{ol}\$ is frequency dependent and we could model it as a 2 pole system:

$$ A_{ol}=\dfrac{A_{DC}}{(\frac{s}{\omega_1}+1)(\frac{s}{\omega_2}+1)}$$

From this, you know that if the pole due to the input capacitance (\$\omega_p\$) is close to the \$\omega_2\$ pole, you are adding an extra 90 degree phase shift and that puts you closer to instability. In the ideal case, where \$C_p\to 0\$, this pole is far away from the second pole of the open loop opamp gain, but as you increase the resistors' values, the pole may move to a bad spot. That is why, from a math standpoint, you may have to reduce the resistor values to avoid this.

In order to compensate for this, you may place a capacitor in parallel with the feedback resistor (as you have it), and then choose \$R_1C_p=R_FC_F\$ and that will cancel out (ideally) the effect of the pole caused by the parasitic capacitance. You could go through the math and derive this, I just didn't want to expand a lot more on what already has a good answer by Andy.