I was studying a schematic of an universal 48-pin device programmer, and while most of it seems pretty straightforward to me, I have trouble understanding the reasons behind some of the decisions made by the original author for the pin driver circuit. Below is the block diagram of the programmer:
Combined schematic for a single pin looks like this:
Each of the 48 pins can be connected to GND, VCCX (a programmable voltage VCC rail), VPP (a programmable voltage VPP rail), or act as an input pin. The questions I am asking for help with are (please refer to full schematic linked above):
- Why use an ULN2003L to control base of QVPP to switch the VPP voltage for a pin? Why not drive the base directly from the output of SN74LVTH273DW?
- What is the function of schottky diode in VCCX switch?
- Each pin is connected to a FPGA via two resistors and a diode (BAV70), see the block diagram. How is the FPGA being protected from high voltage (e.g. 5 volts) potentially being output by programmed chip to some of its pins?
- All pins are also connected to a common PULLUP (which can be switched to be either pull-up or pull-down by the MCU), but I don't get why would one need to pull all pins at once to VCCX or GND, and why wouldn't doing so interfere with supplying power to the chip's power supply pins? Or, perhaps the PULLUP function is there for a self-test to change state of all pins and read them back in FPGA?
Thanks in advance!