I know mixing SPI and I2C is a bad idea, but, when using a microcontroller short on pins, is it safe to share clocks between both buses, provided both are running at bus-tolerable frequencies?

In my application, I plan on using one bus at a time, but I suppose this question applies even if that was not the case.

  • \$\begingroup\$ Hm. Why the linked question is not good enough for you? \$\endgroup\$
    – Eugene Sh.
    Aug 15, 2018 at 18:20
  • 1
    \$\begingroup\$ It depends on stray noise coupling to shield pairs on two cables and ground noise. Wire impedance, load and rise time, ringing \$\endgroup\$ Aug 15, 2018 at 18:22
  • \$\begingroup\$ That question asks about sharing clock and data. \$\endgroup\$
    – baum
    Aug 15, 2018 at 18:22
  • \$\begingroup\$ If there is one line i would nit mix, it's the clock. Although in specific cases it may still work. Funny, i never saw such problem, probably you should not have it too, with right design. \$\endgroup\$
    – user76844
    Aug 15, 2018 at 18:23
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    \$\begingroup\$ Be aware that I2C target slave devices can perform clock stretching on the SCL line. That requires open drain type behavior at the master side. SPI clock would generally want an active push-pull driver stage instead of the lazy rise time afforded by a open drain with a pull-up resistor. \$\endgroup\$ Aug 15, 2018 at 18:42

1 Answer 1


You could theoretically do this but you'd have to use two different buffers. The system I'm envisioning would have a bidirectional buffer with tri states might work (or maybe two) and you could switch the SPI bus on and the I2C bus off.

The pull ups for I2C could be on the other side of the buffer

However if one is using a small micro, they are probably doing so to save on space and you might as well use a bigger micro than a micro and a buffer (or two).

  • \$\begingroup\$ Why would you need buffers (assuming your micro is the master of both busses)? When you're talking SPI, the I2C SDA doesn't move - so no I2C Start condition. When you're talking I2C, the SPI nCS lines stay inactive. \$\endgroup\$
    – brhans
    Aug 15, 2018 at 18:33
  • \$\begingroup\$ So you could neglect the pull ups and avoid signaling the I2C bus when your running the clock. I suppose you could share just the clock line but the speed might drop with the pull ups on there. In the least I would want to buffer the I2C line and switch the SPI lines to push pull \$\endgroup\$
    – Voltage Spike
    Aug 15, 2018 at 18:40

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