Question: What is the electrical advantage to paralleling smaller capacitors to reach a given capacitance, rather than using fewer smaller capacitors on the output of a DC power supply?
For example, using 10x10uF, instead of 1x100uF, 2x47uF, 3x33 uF...
I think it may be to lower overall ESR (see 1st point in 1st answer here). If that's all it is, fair enough, question closed.
The question comes from TI's webench tool; the few design requirements I've inputted spit out schematics like below, with 9x22uF caps instead of 2x100uF or similar. Note: the schematic combines a few output caps, but I've attached a grab of the BOM also to show its 9.
I'm not sure if they do this to optimize another side of the design; PCB space, cost, etc. The tool lets you optimize your design by cost, PCB space, and efficiency.