I would suggest that you will NOT be able to use 3 * 120 to attempt to draw 300A discharge current from a capacitor.
There will be differences between the devices and any reasonable attempt to balance the current across those devices will simply limit the maximum current drawn.
To understand the problem at such high currents you should read some of the datasheets and application notes from IXYS.
Consider firstly a single device able to sustain 360A, such as the IXYS IXFK360N15T2. First thought is that this might be up to the task BUT then you have to consider the limitations:
The device CAN support 360A, but not continuously (In fact it can support short pulse currents up to an amazing 900A).
From the datasheet wee see that the bonding and leadframes can only support 160A. In addition energy density within the channel will eventually lead to local melting and failure.
The real practical capability of the device is clearly shown in the SOA graph below:
As the current increases the VDD will increase and the lead limits, bond limits and chip limits mean you have to reduce the time that you can sink this current.
For example, if you are discharging a small 0.1uf capacitor from say 100 volts, it will discharge rapidly, but if you try to discharge a supercap array from 100 volts, then you simply be generating blue light.
You didn't specify the capacitor or the voltage so it's hard to offer advice, but you can think of the discharge circuit as simply the capacitor ESR and the FET RDS(on) as the limit of the problem.
If the capacitor ESR is close to the RDS(on), then approximately half the capacitor voltage will appear as VDD. From there it's simply an RC problem ...how long and at what rate will the VDD drop.
Too long to discharge and things will start to melt, which is impressive and demands attention when it happens ...but not very practical.