22
\$\begingroup\$

I've been reading more about proper grounding techniques and using ground planes.

From what I've read, ground planes provide a large capacitance with adjacent layers, faster heat dissipation, and reduce ground inductance.

The one area I'm particularly interested in is the stray/parasitic capacitance created. As I understand it, this is beneficial for power traces but potentially detrimental to signal lines.

I've read a few suggestions about where to place solid ground planes, and I was wondering if these are good recommendations to follow and what would constitute an exception to these suggestions:

  1. Keep ground plane under power traces/planes.
  2. Remove ground plane from signal lines, particularly high speed lines or any line susceptible to stray capacitance.
  3. Use ground guard rings appropriately: Surrounding high impedance lines with a low impedance ring.
  4. Use local ground planes (same goes for power lines) for IC's/sub-systems, then tie all grounds to the global ground plane at 1 point, preferably near the same place the local ground and local power lines meet.
  5. Try to keep the ground plane as uniform/solid as possible.

Are there other suggestions I should take into consideration while designing the ground/power of a PCB? Is it typical to design power/ground layout first, signal layouts first, or are these done together?

I also have a few question about #4 and local planes:

  1. I would imagine connecting local ground planes to the global ground plane might involve using vias. I've seen suggestions where multiple small vias (all in roughly the same location) are used. Is this recommended over a single larger via?
  2. Should I keep global ground/power planes beneath local planes?
\$\endgroup\$
23
\$\begingroup\$

2) I highly recommend AGAINST cutting ground anywhere near high-speed signals. Stray capacitance really doesn't have too much of an effect on digital electronics. Usually stray capacitance kills you when it acts to create a parasitic filter at the input of an op amp.

In fact, it is highly recommended to run your high-speed signals directly overtop of an unbroken ground plane; this is called a "microstrip". The reason is that high frequency current follows the path of least inductance. With a ground plane, this path will be a mirror image of the signal trace. This minimizes the size of the loop, which in turn minimizes radiated EMI.

A very striking example of this can be seen on Dr. Howard Johnson's web site. See figures 8 and 9 for an example of high-frequency current taking the path of least inductance. (in case you didn't know, Dr. Johnson is an authority on signal integrity, author of the much lauded "High-Speed Digital Design: A Handbook of Black Magic")

It's important to note that any cuts in the ground plane underneath one of these high-speed digital signals will increase the size of the loop because the return current must take a detour around your cutout, which leads to increased emissions as well. You want a totally unbroken plane underneath all your digital signals. It's also important to note that the power plane is also a reference plane just like the ground plane, and from a high-frequency perspective these two planes are connected via bypass capacitors, so you can consider a high-frequency return current to "jump" planes near the caps.

3) If you have a good ground plane, there's pretty much no reason to use a guard trace. The exception would be the op amp I mentioned earlier, because you may have cut the ground plane underneath it. But you still need to worry about the parasitic capacitance of a guard trace. Once again, Dr. Johnson is here to help with pretty pictures.

4.1) I believe that multiple small vias will have better inductance properties since they are in parallel, versus one large via taking up approximately the same amount of space. Unfortunately I cannot remember what I read that led me to believe this. I think it's because inductance of a via is linearly inversely proportional to radius, but the area of the via is quadratically directly proportional to the radius. (source: Dr. Johnson again) Make the via radius 2x bigger, and it has half the inductance but takes up 4x as much area.

\$\endgroup\$
  • \$\begingroup\$ You mentioned digital signal in particular, but I'd assume that high speed analog signals should follow the same recommendations? \$\endgroup\$ – helloworld922 Sep 6 '12 at 17:06
  • \$\begingroup\$ I believe it depends mostly on what the signal is connected to. For digital circuits, a little bit of extra capacitance has hardly any effect. For analog circuits, especially very sensitive op amps, that little bit of capacitance can make the op amp oscillate. (continued...) \$\endgroup\$ – ajs410 Sep 6 '12 at 17:27
  • \$\begingroup\$ By "high speed" I generally mean in excess of 10 MHz. In fact, digital signals tend to be even faster due to the harmonics needed to create sharp edges, so a 10 MHz digital signal might contain 100 MHz frequencies. This is in contrast to a 10 MHz analog signal, which really only contains 10 MHz frequencies. Now if by "high speed analog" you mean microwave RF, I am uncomfortable making any recommendations because I've never done that kind of design. I do know that parasitic capacitance is a huge concern at that level. \$\endgroup\$ – ajs410 Sep 6 '12 at 17:29
  • \$\begingroup\$ Interestingly, I was just reading an application note from TI and they, unless I am reading wrong, recommend cutting away copper from under the DisplayPort connector to prevent discontinuities. "Avoid metal layers and traces underneath or between the pads off the DisplayPort connectors for better impedance matching. Otherwise they will cause the differential impedance to drop below 75 Ω and fail the board during TDR testing." ti.com/product/SN75DP126/datasheet/layout \$\endgroup\$ – philby Sep 25 '16 at 13:45
  • \$\begingroup\$ @philby, DisplayPort uses differential signalling so there is no return current on the gnd plane - thus they can justify removing the gnd/pwr plane from under the signals. \$\endgroup\$ – PaulB Oct 28 '16 at 18:29
3
\$\begingroup\$

As far as connecting local ground planes to global ground plane is concerned, it is better to use multiple small vias as it will help to distribute the current and also the failure rate of PCB is minimized besides providing better heat dissipation.

There is no harm in keeping global ground/power planes beneath local planes as if you observe multilayer pcb designs, it is what is followed.

\$\endgroup\$
3
\$\begingroup\$

Be careful not to loosely define high frequency.

Transmission line effects, requiring microstrip or stripline techniques, are worth considering when the length of the line is 1/100th or greater of the signal's highest frequency of concern (Ulaby). So, this is useful for microwave designs. For example, a 1GHz waveform in air has a length of 30 cm, however in FR-4 it has about half that (sqrt of epsilon r, relative permittivity, for FR-4 is approximately 4, depending on composition). Therefore, a trace that is a few centimeters long would definitely be of concern for 1GHz.

For 10MHz, transmission line effects are hardly noticeable. The fifth harmonic of 10MHz is 50MHz, and in FR-4 that would be about 150x10^6 m/s / 50x10^6 = 3 meters. So, in a 30 cm long bus one might experience the very beginnings of phase distortion.

The real concern is noise. By laying a trace of sufficient width over a ground plane, the signal's energy propagates through the substrate between the trace and the ground plane (Poynting). And EMI from other sources can't get in.

Microstrip lines have characteristic impedance which is determined by the trace width and substrate thickness and material; thinner traces have higher characteristic impedance. The impedance of free air is 377 ohms. As a trace's Zo approaches this figure it begins to radiate. Even with a ground plane. By the same token, thickening the substrate has the same effect. Note that when working in high frequency, impedance is key... termination, matching... a sufficiently long bus will have measureable reflections if not terminated correctly.

However, with dense designs comes the need for thin traces. So, compromise something.

\$\endgroup\$
1
\$\begingroup\$

To keep microstrip line impedance unchanged by a ground plane slot, the slot must be located at least two microstrip widths away (if the microstrip is projected vertically to the ground plane).

Below are several pictures from a 3D field solver showing distribution of electric field inside the micrsotrip and current density in the ground plane. The conclusion there is almost no field or current two width away from the micrsotrip. So ground plane breaks are allowed here.

Figure 1: Electric field cross section perpendicular to the stripline. 2D view. enter image description here Figure 2: Electric field cross section perpendicular to the stripline. 3D view. enter image description here Figure 3: Current density in the ground plane. 2D view enter image description here Figure 4: Current density in the ground plane. 3D view enter image description here

\$\endgroup\$

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.