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I was looking at an example board schematic provided by TI and I noticed something rather curious: vias were placed directly on SMD pads. Is this a normal/acceptable practice to follow? Or is it recommended/better to put a short trace and then have a via?

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Vias in the pads are useful in high speed designs since they reduce trace length and therefore inductance (i.e. the connection goes straight from pad to plane rather than pad-trace-via-plane)
You have to check whether your PCB house can do this though, and it may cost more (via will need to be plugged and plated over to provide a smooth surface) If you can't put the via in the pad, putting directly adjacent and using more than one can help reduce inductance.

They are also useful for Micro-BGA designs, where space is very limited and traditional fanout techniques cannot be used.

A via-in-pad (or capped/plated via) is not to be confused with a "tented via", which is a standard via with soldermask covering the hole (hence "tented")

To illustrate the advantage, here is an example of a TQFP footprint fanout with standard vias and via-in-pads:

Via-in-pad comparison

It's easy to see why the via-in-pad version is preferable for high speed designs that need to keep inductance low.

The reason it's more expensive is due to the complex process (compared to standard vias) and potential problems (e.g. plating bulging with expansion of plug, or dimpling)
This document discusses various plugging techniques.

Here is a run through of the process:

enter image description here enter image description here enter image description here enter image description here enter image description here enter image description here enter image description here enter image description here

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    \$\begingroup\$ If a board house could handle vias packed as closely as in the second example, is there any reason they couldn't place the vias much closer to pads than shown in the first (and possibly put many of them in the middle of the footprint)? A design like the first is helpful during development, but I think the space savings from pad-on-bia would mainly matter for things like BGA. \$\endgroup\$ – supercat Oct 20 '16 at 17:11
  • \$\begingroup\$ @Oli Glaser I just want one clarification about your nice explanation. You said "If you can't put the via in the pad, putting directly adjacent and using more than one can help reduce inductance." What you mean by more than one here? Is it more than one via? \$\endgroup\$ – Rajesh Jan 3 '18 at 3:43
  • \$\begingroup\$ @Rajesh - sorry for the delay, I have been very busy with projects for quite a while. Anyway, yes I meant more than one via. You would typically use this with a bypass capacitor on high frequency components. As supercat mentions, the space saving and inductance reduction matters more when you are working at high speed with things like BGAs where layout can become very difficult. Have a read of High speed digital design: amazon.com/High-Speed-Digital-Design-Handbook/dp/0133957241 and other similar books, they will help if you are interested :-) \$\endgroup\$ – Oli Glaser Apr 5 '18 at 10:48
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In general it's bad practice: the solder paste may get sucked in the via capillarily, leaving too little to solder the part's connection. I would place the via as close as possible next to the pad, with a narrow connection which won't draw the solder paste from the pad.

There's a technique called tented via which avoids this by covering the top of the via, but it's covered with solder mask, so that's not usable on a pad.

edit
Fake Name comments that I forgot to mention plugged vias, and they may indeed be a solution. I didn't mention them at first because I've never used them, and can't comment on possible pitfalls. Oli's answer has a very nice illustration of the technique and everything just screams "expensive!" (anywhere between very expensive and Damn Expensive™). You may need plugged microvias though for a small pitch BGA, like 0.5 mm.

Staggered microvias don't require plugging and the copper caps, but are buried vias, so also expensive.

enter image description here

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  • \$\begingroup\$ You forgot plugged vias, which are vias filled with a conductive compound, most commonly conductive epoxy, and plated over. \$\endgroup\$ – Connor Wolf Sep 2 '12 at 9:36
  • \$\begingroup\$ @Fake - Added to my answer. Thanks for the feedback. \$\endgroup\$ – stevenvh Sep 2 '12 at 10:14
  • \$\begingroup\$ It would be nice if you could credit the source of the image you used. \$\endgroup\$ – Armandas Sep 27 '12 at 13:22
  • \$\begingroup\$ @Armandas - sorry, no can do :-(. This is from the Google images cache, the source page doesn't seem to exist anymore. That's also the reason for the reduced size, the original must have been larger and better readable. \$\endgroup\$ – stevenvh Sep 27 '12 at 13:30
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When ordering PCBs to be manufactured, you can expect the vias to be drilled slightly off. Depending on how far this "slightly" is, the via might mess things up.

I'm sure TI has the best quality PCB manufacturing available. If you're using a cheap PCB manufacturer though, you may expect some visible imperfections.

Sometimes putting vias on pads is recommended. A power component soldered on to the PCB will very often have numerous vias connecting its big thermally conductive ground pad to the GND trace on the bottom layer. In high frequency designs you have to take into account the trace lengths of your PCB. It may sometimes be beneficial to put a via directly on a pad to reduce trace length.

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    \$\begingroup\$ agree with via on pads for heat. I have used vias on the large pad of a D2Pak regulator to get the heat down to the ground plane \$\endgroup\$ – justing Sep 1 '12 at 23:46
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It is sometimes done with BGA devices, or to minimise inductance. The vias need to be plugged, which is very expensive.

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No, no, no, no, no. Don't place vias on the pads*. The solder will suck into the via and create a faulty soldering. The solder joint will not have enough solder to be reliable.

This practice is expressly forbidden in any company taking their work seriously. I have worked e. g. at a major manufacturer of telecom equipment: Don't even think about via-in-pad.

I have seen a number of such solder joints. And I have seen such joints crack up after a while, losing contact.

In our design rules I have defined this as no-go. There shall be at least 100um solder mask between the pad and the via, exactly to avoid this problem.

If your assembly house makes sloppy work they will let you do this. If they are careful they will ask you to move the vias out of the pads.

*Exceptions: -Certain RF applications may need the pad in the via, but then the common practice is to use many vias.

-BGAs may require via-in-pad because there may not be enough space to route the board otherwise.

-Certain pads for power dissipation use vias in the big pad to conduct the heat away.

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I'm talking with experiences not imaginary recommandation with no actual evidence to back it up. You already asked for the smd pads not BGAs, nevertheless I saw many answers that only cover up for BGAs/ICs fanouts not the passive components.

To put it short, yes you can but you need a little care along the way.

Myth: via-in-pad is a bad practice

Via in pad is a bad thing if your via's hole occupy more than 30% of the pads area AND if your pad is too small too! If your pad be too small and you use mechanical drill this might blow out the pad. In this case your manufacturer may recommand to you that use laser drilling instead of mechanical drill and it surely cost you more. Moreover in the assembling proccess to avoid sucking out solder paste you need to resin plug these vias too which again cost you more.

Via In Pad for Passive Components

But all these recommendation are only for the BGA parts, If your pad be big enough and your hole size be small relative to the pad size (like the TI board you mentioned) you don't need any laser drilling nor plugging the vias because it's effect will be too small to be noticable.

My Experience

I've had a succesful experience with placing 0603 component (imperial) with 0.3mm via in it and 0402 component (imperial) with 0.2mm vias in it on my board. In both of these cases I had used mechanical drilling with no resin plugged holes. I doesn't saw any defect on a batch of 1000 board with more than 40 component like the following figure enter image description here

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Via-in-pad is generally considered bad practice for automated assembly processes, as the solderpaste may be drawn into the via during reflow soldering and result in a poor quality solder joint between the device pin and the pad. This can be mitigated by using plugged vias, with the associated additional cost.

That being said, this practice is used in specialized RF and harsh environment electronics where hand assembly, or visual inspection and hand touch-up are used to ensure near perfect solder joints at every point. If you're doing a small run to be assembled by hand, this shouldn't be a problem for you.

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