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I was thinking to integrate a MIPI display into a project with a STM32L4R9 processor, which in my package of choice exposess only 1 of it's two MIPI lanes.

The data sheets of all displays I viewed where rather mysterious about how to operate, but most of them had 4 lanes on the connector side. (data sheet example)

My question now is, can I operate a 4 lane MIPI display with just one lane connected, or do I have to search for a one lane display particularly?

Thanks for any help!

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    \$\begingroup\$ It might be possible as MIPI has a lot in common with DisplayPort and PCIe, but it still has a lot of uniqueness too. One thing's for sure, even if it works, you won't get the banner refresh rate as you now only have 1/4 the normal bandwidth, this might also be an issue. \$\endgroup\$
    – Sam
    Aug 27, 2018 at 8:23
  • \$\begingroup\$ The information to be displayed is rather static, so this wouldn't be a problem, thanks for your guess, I might consider contacting the vendor of the driver IC, hoping he will reply... \$\endgroup\$ Aug 27, 2018 at 9:32

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I read a little more into some data sheets, especially the driver ICs, exposing most of available displays connector pins. Seems it is generally given by the driver IC how many lanes to use (i.e. RM67191 IC can handle 3 or 4 lanes, which is determined by the wiring of the IC, normally given fixed by the display of choice).

A possible solution to nonetheless use any display to a given setup is by using a driver IC (i.e. SSD2848) which can often handle n-lane input to m-lane output, providing some extra features (frame buffer, resolution scaling, ...) which for some application might be an overshoot of an extra IC, instead of just searching an display with adequate lanes for your applications directly.

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    \$\begingroup\$ Did you end up trying to connect the four-lane display to one lane of MIPI without the bridge IC just to see if it could work? I have a similar interest in using a microcontroller with two MIPI lanes to drive a three-/four-lane display. \$\endgroup\$ Oct 22, 2020 at 13:30

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