If you want to go the direct digital synthesis route with discrete chips, capacitors, etc. the result won't be nearly as compact as what could be done with a CPLD or micro, but would be pretty reasonable, especially since a significant amount of the circuitry could be shared among the five signal outputs.
Global signal generation requirement:
- Input clock source
- 12-bit counter (74HC4040)
- 14 inverters (3 of 74HC14, leaving 4 gates open)
- 13 small-signal capacitors
- 13 resistors
Per-output requirement:
- 13-input NAND gate (74HC133)
- 12-bit counter (MC14521 or CD4521)
- Lots of jumpers to set frequency
More details to follow. Given an input of 4,096,000Hz, the circuit should be able to produce square-wave outputs from 2KHz to 512Khz in multiples of 0.5Hz for signals up to 2KHz, 1Hz for signals up to 4Khz, etc. Other techniques can be used to convert a square wave thus generated into a sine wave.
Here's a circuit diagram to show the concept:
(HERE)
This circuit includes a configurable frequency generator (5 switches select input frequencies from 1/16 of the input up to 31/16 of the input). I also threw on a rough square-to-sine converter. Note that unlike most filtering techniques, this one maintains a reasonably consistent amplitude over the frequency range. The wave is quite rough because the above circuit only uses 4-bit counters. The MOSFETs would be replaced in practice by 4066 pass-gates (4 per chip).