A very important (maybe even the most important) parameter of CMOS processes is the number of gates per area. I think that this 15% better performance is directly this number as it is easy to use for translation to a business case (does it make sense to use 20 nm instead of 28 nm?).
This number (often expressed in \$kgates/mm^2\$, where 1 kgates is 1000 gates) can be directly related to processing power. For example to make a certain design CPU the company using or owning the design will know how many (k)gates are needed.
From that they can calculate how much area is needed for a certain function. Since in chip manufacturing Area is hard coupled to price (prices are calculated in \$$$/mm^2\$) that would give a good indication of cost as well.
Since most modern CMOS processes offer high performance (but power hungry) and low power (but less performance) versions of the same process, using the actual maximum speed of a process as a performance indicator is more complex than the number of gates per area parameter.