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I'm not sure this is the right way to ask this, but I'm giving it a try anyways. I'm essentially looking for a component that using a clock signal can open and close 4 other channels.

Clock | 0 1 0 1 0 1 0 1
S0    | 0 1 0 0 0 0 0 0
S1    | 0 0 0 1 0 0 0 0
S2    | 0 0 0 0 0 1 0 0
S3    | 0 0 0 0 0 0 0 1

0 and 1 represents low and high respectively.

On the rising edge, set the current to high on the output specified above. goes low again on falling edge.

What is the name of this component, if it even exists? Im looking for a dip-8 alternative if that would be possible.

Kind Regards

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    \$\begingroup\$ How fast is the clock? What are the voltage levels? How much current at the outputs? \$\endgroup\$ – Elliot Alderson Sep 4 '18 at 15:38
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    \$\begingroup\$ Do the S outputs stay high forever once the Clock has a rising edge? \$\endgroup\$ – mike65535 Sep 4 '18 at 15:40
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For a particular pattern like you have shown, there may be a solution if you can go a little larger than an 8-pin dip. Essentially your outputs sequence in turn. This is actually a lot like an "LED chaser" type of circuit often build around a CD4017. You have the added complication that you need to disable all the outputs when the clock is low, and unfortunately this chip does not have an output blank or enable signal. So in addition to being too large you would need to follow it with something else. It's possible there might be some legacy function that fits your needs, but most older logic ICs have larger than 8-pin packages.

For the arbitrary form of this problem, realistically, if the clock speed is not too fast, you may want to use a microcontroller. You might be able to do this with say an ATtiny85 (or 25 or 45) at a rate of up to maybe 500 thousand or even a million times a second. A main advantage here is that you fit in the 8-pin DIP requirement (5 usable I/Os without disabling the reset fuse which makes reprogramming difficult).

To go fast you'd likely want some small piece of programmable logic, historically a PAL or GAL, today a CPLD. But these aren't available in your desired 8-pin DIP. You used to be able to get PALs in 16 pin DIPs, but CPLD's are pretty much all surface mount.

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  • \$\begingroup\$ Yup, that's probably the closest i can get. I'm pretty sure there's a way around the disabling of outputs in my case. The microcontroller was also a good suggestion. Thanks! \$\endgroup\$ – Olle Sep 4 '18 at 15:51
  • \$\begingroup\$ To disable the outputs: put an AND gate on each output and AND each output with the clock signal. \$\endgroup\$ – Transistor Sep 4 '18 at 16:34
  • \$\begingroup\$ Yes, an AND gate would work, but once you have two DIP packages that 8-pin ATtiny looks more and more attractive. Especially if done right with sleep modes and a wakeup interrupt. Or maybe it's time to take the plunge on easy SMT, such as SOIC packages. \$\endgroup\$ – Chris Stratton Sep 4 '18 at 16:35
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Why not use a shift register? Clock in whatever pattern you want from a microcontroller. Or better yet, just use a microcontroller directly, such as ATTiny24 or ATTiny25.20-30mA drive current, 3V to 5V. 8 pins: 2 for power & gnd. 1 for clock. 1 to enable the pattern when high, or halt it, or clear it, when low, as an example. 4 for outputs.

Would be easy to program in using the Arduino IDE.

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  • \$\begingroup\$ That was my initial plan, to use a 2bit shift register and use a multiplexer. only using the shift register would yield: 0000 0001 0010 0011 etc. whereas i was looking for 0001 0010 0100 1000. The microcontroller is a good suggestion though :) \$\endgroup\$ – Olle Sep 4 '18 at 15:44

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