For a particular pattern like you have shown, there may be a solution if you can go a little larger than an 8-pin dip. Essentially your outputs sequence in turn. This is actually a lot like an "LED chaser" type of circuit often build around a CD4017. You have the added complication that you need to disable all the outputs when the clock is low, and unfortunately this chip does not have an output blank or enable signal. So in addition to being too large you would need to follow it with something else. It's possible there might be some legacy function that fits your needs, but most older logic ICs have larger than 8-pin packages.
For the arbitrary form of this problem, realistically, if the clock speed is not too fast, you may want to use a microcontroller. You might be able to do this with say an ATtiny85 (or 25 or 45) at a rate of up to maybe 500 thousand or even a million times a second. A main advantage here is that you fit in the 8-pin DIP requirement (5 usable I/Os without disabling the reset fuse which makes reprogramming difficult).
To go fast you'd likely want some small piece of programmable logic, historically a PAL or GAL, today a CPLD. But these aren't available in your desired 8-pin DIP. You used to be able to get PALs in 16 pin DIPs, but CPLD's are pretty much all surface mount.