# Why does a MOSFET enter saturation?

From all my browsing, it has become clear that as drain-source voltage increases, we eventually reach saturation. Mathematically, Vds>Vgs-Vt is the condition we look at. But when I try to understand it logically, we need a reverse bias at Vgs to attract minority carriers from substrate to form a channel. So now that the channel is formed, a drain source voltage gives rise to a current flow due to electrons. It also makes sense that Vds should produce a depletion region at one of source/drain and reduce depletion region.

But how would all this relate to channel widths, saturation and everything else that gives rise to saturation?

• I am not an expert with MOSFET. But i will add few cents. at the onset of saturation channel width will become almost constant with less variation. Commented Sep 4, 2018 at 17:46

I think you're confused with the behavior of a Bipolar transistor.

For a BJT the Collector Base junction will be nearing forward bias to enter saturation mode.

Take note:

• for a BJT, saturation means that the transistor does NOT determine the collector current Ic. This happens when $V_{ce} < V_{ce,sat}$

• for a MOSFET, saturation means that the transistor DOES determine the drain current Id. This happens when $V_{ds} > V_{ds,sat}$

we need a reverse bias at Vgs to attract minority carriers from substrate to form a channel No that's not how the channel is formed.

Reverse bias means that there must be a PN junction, there is no junction involved for the gate. The gate is formed when (for an NMOS) the gate potential is higher than the substrate potential + Vthreshold. The positive voltage pulls the negative carriers (electrons) towards the gate oxide to form a channel.

This picture shows the situation when an NMOS is in saturation mode. Note how there is a gap (of length $\delta$) between the right end of the channel and the drain. The amount of current that can flow is determined by the shape of the channel, as long as $V_{gs}$ remains constant and there is at least some distance between the channel and the drain ($\delta > 0$) then the NMOS will remain in saturation.

Channel width and other parameters are indeed all related to saturation mode. It goes a bit too far to explain all the relations here. My advise to you is to think about what happens to the channel in the MOSFET when one parameter is changed like, an increase in $V_{gs}$ or a slightly longer transistor.

• Still can't understand how in saturation Id is dependant on the transistor. The very definition of saturation means that something has reached a peak value. Meaning that it should't depend on Vds. As for the channel, shouldn't it stay uniform? Vgs frees up electrons in the substrate. And then Vds gets it to act as a wire. And even if there had a parity, wouldn't the right side have MORE free electrons? Commented Sep 5, 2018 at 13:01
• Meaning that it shoul't depend on Vds And that's correct, but, there are other parameters like Vgs and size of the transistor. Those do influence Id in saturation mode. OK, I cannot dynamically change the size of the transistor but i can change Vgs. Lowering Vgs will make the channel smaller and decrease Id. Commented Sep 5, 2018 at 13:04
• Wait, I think I got it. the gate voltage produces attracts valence electrons and not free electrons. Vds essentially releases them, leaving behind uncompensated cations. So eventually Vds says, "I have only these many electrons to work with." meaning that there is as saturation and a decreased channel length. But isn't it likely that increases in vds would increase the rate of electron flow as well? Or is it just that without a channel, there is only so much that current can grow? Unless Vgs goes up and releases more free electrons. Commented Sep 5, 2018 at 13:10
• Uhm, not really, the gate does attract free electrons. But really, what the carriers form the channel is irrelevant. What is relevant is Vgs as it will determine the shape of the channel. That shape then determines the current. Commented Sep 5, 2018 at 13:25
• time to drop out of college Commented Sep 5, 2018 at 13:34