As per datasheet of EEPROM: CAT24C02 (On Semiconductors) - P/E Cycle count is > 1000k whereas as per datasheet of NAND Flash: MX30LF2G18AC-TI (MXIC) - P/E Cycle count is > 100k

I would like to know why there is such high difference in P/E cycle count because as per my understanding from internet websites; EEPROM & Flash memories are similar types of programmable memories.

  • \$\begingroup\$ Similar perhaps, but not the same. A google search on wear limits for various types of memory should get plenty of results for past circuit and future developments. \$\endgroup\$ – winny Sep 5 '18 at 14:01

Thanks for the example part numbers. The difference is essentially a design choice; both operate by tunneling electrons on and off a floating gate, but the two examples you give are of very different capacity and therefore density. The tiny part with the high number of erase cycles will have larger, more durable cells compared to the high-density part.

Note that as density goes up, the amount of wear on any individual cell would normally go down. It takes longer and longer to write all the cells in the device.

  • \$\begingroup\$ They could make microcontrollers with FRAM, high speed access like SRAM, nonvolatile like EEPROM. \$\endgroup\$ – CrossRoads Sep 5 '18 at 17:59
  • \$\begingroup\$ TI make some with FRAM if you want. \$\endgroup\$ – pjc50 Sep 6 '18 at 6:46

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