I didn't watch the video, but I know PCB power/ground planes with small FR4 thickness are very high Q low ESL, low ESR dielectrics and excellent for ripple decoupling.
It is also true that "some" SMPS IC's and MOSFET LDO's have low phase margin when the load Cap ESR is TOO small as the ripple voltage feedback is too low to regulate the voltage error with adequate phase margin.
Of course, having a low-frequency resonance near an operating point of an oscillator like boost oscillators that can run > 1MHz with variable frequency PFM instead of PWM... is not a good design. This could lead to intermodulation or "aliasing" errors or a beat frequency.
Since inductance is due to the physical aspect ratio and inductance increases with L/W ratio which lower the series resonant frequency (SRF). So some caps have intentionally higher ESR for VHF/UHF use to avoid spurious high Q resonances that interact with multiple caps in parallel.
However, the problem you state in the question is actually a solution called Zero Valley Switching (ZVS) type buck converters that regulate at minimal losses on a pulse to pulse basis. It is not just close but actually IS the resonant frequency of the LC components chosen.
Learn as much as you can about component Q's and how this affects Bandwidth, rise time and overshoot. Component Q's must also be greater than a circuit resonant Q's when this desirable like crystal filters or microwave LC ladder filters.
Learn as much as you can about impedance ratios vs f in analyzing any reactive parts.