I'm powering an op-amp (OPA657) in transimpedance configuration. I externally supply ±15V, with LDOs to drop to ±5V; here I omit the feedback loop for simplicity:

relevant op amp connection

When I turn on the negative rail (-15V) first, my positive-regulating LDO (LDL1117S50R) somehow gets exposed to what I measured at -0.8V at the output, highlighted in the below image:

positive LDO

When I then turn on the positive rail (+15V), the LDO doesn't regulate the incoming +15V; the output just sits at -0.8V. The only way to get it working is power-cycling, and making sure the positive rail comes on first.

What is happening? I had an older TO-220 regulator there before and it was fine.

I realize I'm inadvertently exposing the LDO beyond its absolute maximum negative voltage at its output (according to the datasheet, it's -0.3V). How do I prevent this from happening? I don't want to do any complicated power supply sequencing.

For reference I have snipped the negative rail section:

negative rail

  • \$\begingroup\$ Welcome to EE.SE. Why can you not have both +15 volt and -15 volt come on at the same time? \$\endgroup\$
    – user105652
    Sep 7 '18 at 2:32
  • \$\begingroup\$ You might want to figure out why it gets pulled down that much, and maybe a diode to gnd is sufficient when there is not to much current involved \$\endgroup\$
    – PlasmaHH
    Sep 7 '18 at 6:06

enter image description here

When the Vout is below ground it cannot bias the regulator to start up as the NPN's to ground are reverse biased.

The LM85 bias network is improved and appears to prevent this issue. enter image description here

What can you do?

Consider the minimum load current 5mA and the idle current 10 mA max and use a pull-up on Vout to Vin+ that forces Gnd to be < Vout+ during V- startup. ( remember Gnd can be floating and just a 0V ref. at some point.)


  • A Zener from Vin to Vout greater than the expected drop which overloads V- until V+ starts? maybe brute force method...

  • a CC regulator SMD 20mA chip from Vin to Vout? Not a good idea if the load is less than 20mA then it pulls the Vout higher since it is an emitter follower output.

  • Power management cct to ensure both are OK before enabled to IC. ( too much trouble)
  • A resistor divider that draws > 10mA from Vin to Vout and GND so the external voltage V- its pull-up ( more current ) from the V+ being off? YES
  • a simple idea may work but depends on dynamic current flow as V- starts up

  • compare with a LM317 ? maybe

Idle current spec : Vin ≤ 8V 5(typ) 10 mA (max)

Remember LDO's only source current and not sink.
But if the output is reverse biased relative to GND they cant source either because the Gnd is a controlled current sink.

Best bet

  • Power Schottky diode from Gnd to Vout with a R divider on Vout from Vin to gnd to bias the output for 10mA just below the regulated output worst case, never above.
  • \$\begingroup\$ My application is very noise sensitive, I can't use any switching ICs. Why doesn't the L78M05 have this issue? It seems to start up fine despite having a similar block diagram? \$\endgroup\$ Sep 7 '18 at 18:22
  • \$\begingroup\$ @user2022444 That TO-220 regulator was most likely in the 78X family, which are not an LDO, by any stretch of the imagination. To a degree LDOs are a compromise, in that they trade stability for performance. As an example, it's fairly hard to get a 78X to oscillate, whereas with a LDO, sometimes with even no to minor violations of their output requirements, they will sing like a bird. In this case, without looking at the datasheet for the old regulator(which you never told us), I would guess it has a built in bias circuit, therefore it does not require an external one. \$\endgroup\$
    – GB - AE7OO
    Oct 20 '19 at 19:54
  • \$\begingroup\$ @user2022444 this is linear not SMPS, The diagrams are different and what other issues did you have? You have a choice now Old BJT LDOs with a 1.5V drop or new FET LDO’s with a RdsOn* Iout drop in a huge range of Vdrop ratings \$\endgroup\$ Oct 20 '19 at 19:59

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