If you use a buffer gate as separate power source where does that extra current come from??? They are drawn as single input and single output. Is there always assumed that there is another power supply there? And if that’s the case why not just use a sinking digital output with a single transistor?

As far as I can tell, these two images are the exact same thing.



  • \$\begingroup\$ Same place the power comes from for a NOT or NOR or NAND gate - i.e. it comes from the power supply which is not drawn on the diagram. \$\endgroup\$ – user253751 Sep 7 '18 at 4:19
  • \$\begingroup\$ I'd suggest adding a diagram. \$\endgroup\$ – RJR Sep 7 '18 at 5:56
  • \$\begingroup\$ Yes a diagram is great idea. I added two pictures in the original post. \$\endgroup\$ – shakeNbake Sep 7 '18 at 12:29

All digital logic circuits require an external power supply. The power supply and Ground connections are frequently not shown in circuit diagrams.

A single transistor as the output will result in an "open collector" output - the gate can only pull the output low, due to the transistor between the output pin and Ground. Some external device would be required to pull the ouptput "High".

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  • \$\begingroup\$ I added photos to the OP. Are these not the same? \$\endgroup\$ – shakeNbake Sep 7 '18 at 14:36
  • \$\begingroup\$ @shakeNbake What you have drawn is a common collector buffer, which almost unity gain. But as far as voltage buffering, yes, that's what you would use. \$\endgroup\$ – user103380 Sep 7 '18 at 14:38
  • \$\begingroup\$ @KingDuken. OK. but are those two circuits equivalent? if so, why would I want to use a buffer instead of transistor in this case? \$\endgroup\$ – shakeNbake Sep 7 '18 at 14:41
  • \$\begingroup\$ any other takers? \$\endgroup\$ – shakeNbake Sep 9 '18 at 0:11
  • \$\begingroup\$ Logic gates SHOULD NOT be considered as power sources. The outputs of logic gates (including inverters or buffers) are logic signals intended to drive the inputs of other logic gates, microcontrollers, and other digital logic devices. \$\endgroup\$ – Peter Bennett Sep 9 '18 at 6:14

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