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I am using an LT1630 as a buffer...

I know its not the greatest OPAMP for the job because it has fairly Hi input current, but It has good DC characteristic, HI current drive, and rail to rail capabilities which is what I need for this circuit.

Its unity-gains stable as far as know. The Datasheet does not explicitly say it but the example circuits don't show a capacitor in the feedback.

I'm buffering a Hi-Z resistor divider circuit.

The top circuit shows an equivalent resistor in the FB and a 10pF cap. The Datasheet says to use a 10pF cap in the FB to counteract instability caused by the input capacitance.

The Bottom circuit has no additional components...

My question is: Will the top circuit operate as needed even though FB resistor is fairly Hi?

Thanks Tony

enter image description here

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  • \$\begingroup\$ Is V1 static (dc), or does it vary with an applied signal? If there's an actual signal applied for V1 (through the divider), then what are its characteristics? \$\endgroup\$ – Chris Knudsen Sep 11 '18 at 14:07
  • \$\begingroup\$ How is the input voltage range you expect? \$\endgroup\$ – Long Pham Sep 11 '18 at 14:07
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    \$\begingroup\$ The top buffer looks better because of bias current compensation. \$\endgroup\$ – Long Pham Sep 11 '18 at 14:10
  • \$\begingroup\$ v1 will vary, though the AC component will be negligible. Basically i am monitoring a constant DCDC source. \$\endgroup\$ – Tony Sep 11 '18 at 14:54
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The LT1630 lists a bias current up to 1000 nA (1 microamp). This is the amount of current coming into both input terminals. For a DC signal, the upper circuit will compensate for this error while the lower circuit could have an error contribution as high as 1 ua x 50 K (the signal impedance) or 50 mv.

The maximum input offset current is 150 nA, so you are contributing a worst-case 7.5 mV (150 nA x 50K ohms) of error by using a 50K feedback resistor.

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