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Only interested in the binary logic part, not the motor side. The datasheet specifies a few absolute max ratings:

Table 4. Absolute maximum rating

IIN Input current (INA and INB pins) +/- 10 mA

IEN Enable input current (DIAGA/ENA and DIAGB/ENB pins) +/- 10 mA

Ipw PWM input current +/- 10 mA

ICP CP output current +/- 10 mA

ICS_DIS CS_DIS input current +/- 10 mA

and this ON-state supply current:

INA or INB = 5 V, PWM = 20 kHz 8 mA

According to this answer i need to worry about the sank / sourced currents as well as the quiescent current. If this is the case, then how would I identify those currents for my specific part ? Is there a generic rule for any IC ?

edit

I was not clear on this one. What I am looking to do here is to sum up all the currents in my circuit so I can size a voltage regulator for it.

edit

the specs were actually right there in another table, I was just searching for 'mA' instead of 'μA'. Seems these "CMOS compatible" IO pins are very amp-efficient:

IINL Low-level input current VIN = 0.9 V 1 μA

IINH High-level input current VIN = 2.1 V 10 μA

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  • 2
    \$\begingroup\$ FYI: You should never the use the "Absolute maximum ratings", unless you know what the formal definition of that section is. Few people do. And even if they do they seldom need it unless they are designing a device that needs to survive something like a lightning strike or a nuclear blast. \$\endgroup\$ – Wouter van Ooijen Sep 12 '18 at 7:07
  • \$\begingroup\$ Or they are just idiots, happens more frequently, even to the best of us. \$\endgroup\$ – Gregory Kornblum Sep 19 '18 at 9:26
  • \$\begingroup\$ @GregoryKornblum I don't understand. Are you suggesting those specs are incorrect ? \$\endgroup\$ – kellogs Sep 19 '18 at 9:34
  • \$\begingroup\$ They are correct. You should not get anywhere close to them. Check in the manual, they should provide either input circuit or recommended conditions. \$\endgroup\$ – Gregory Kornblum Sep 19 '18 at 9:36
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From experience, 0.6 micron logic, with ~~ 0.7 volt Vthreshold Nmos and Pmos running at 5 volts, will have 100 uA crowbar current for 100 picoseconds. That's for a typical "gate". FlipFlops I'd model as 5X or 500uA.

Thus for each logic transition, you have consumed charge of Q = CV = IT or

Q = 100uA * 100picoseconds = 100e-6 * 100e-12 = 10,000e-18 or 1e+4 * 1e-18

Q = 1e-14 coulombs, for any logic transition in a simple gate, under the conditions I stated.

For 100,000 gates (a mix of gates and FFs) running at 10MHz, the current needed is

I = 1e-14 * 100,000 * 10MHz = 1e-14 * 1e+5 * 1e+6 = 1e-14 * 1e+9 = 10 microAmps.

Seems low, right. But the duty cycle is 100picoSecond/100nanosecond, or 0.1%

And the 100uA per gate for maximum shoot-thru, or crowbar charge, is scaled up by 100,000 gates, to be 10 amperes peak, for that 100picoSeconds. Thus the charge needed for ONE transition, for 100,000 gates is 10Amps for 100 picosecond, or 10 picoCoulombs.

Have that occur at rate of 10MHz, and you get 10e-12 * 1e+6 = 10e-6 amps.

Notice we are NOT including any Input/output charge consumption, nor are we including any parasitic-capacitance (gate capacitors, drain and source implant capacitance, metal-bulk, metal-metal, etc) charge requirements.

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  • \$\begingroup\$ sorry for the trouble, I think I was looking for the logic input / output more as those are the major consumers (?). can you please see the edit ? thanks for the explanation! \$\endgroup\$ – kellogs Sep 16 '18 at 9:25
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Unless you have a lot of ringing and undershoot below ground or overshoot >5.1V at 1mA this spec is actually the DC current for the fast ESD protection clamp diode to both supply and return “rails”. This might not occur until the Vin max near 7V as ESD diodes have a wide tolerance on internal resistance and are probably in two stages with a series resistor. This 2 stage protection results in an actual internal input clamp near 0.1 to 0.2V above 5V and below 0V.

Normally Spec says Logic “1”=>=2.1V @ 10uA and the dynamic switching current is higher but not a factor here and you can use 5V or 3.3 V logic or less.

Meanwhile the diodes also protect the HBM 100pF discharge from 1kV which is a minimal protection for no long cables which have 100pF /m.

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  • \$\begingroup\$ Why do I not make much sense of this... is this a discussion on the absolute maximums ? Please check out my edit, thanks! \$\endgroup\$ – kellogs Sep 16 '18 at 9:29

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