# Logic circuit shutting off at target voltage

I deleted the old question and posted another one because I felt the question is now substantially different.

I have a potentiometer connected to a current source and I want the logic chip to cut off the current altogether when the voltage across the potentiometer reaches a certain value.

I am looking at CD74HC4052E as my chip of choice.

I have learned how the logic chip works by applying 0V to the inputs and confirmed that the output was 5V. Also, when either of the inputs went up, the output voltage was 0V.

I thought as I increase the potentiometer value from zero, the input voltage will go up and once it registers the high voltage threshold, the output would go from 5V to zero.

I think I see why the circuit would not work the way I want it to, the input voltage of the NAND is not really defined the way I would like it to.

I want to know if there's a way I can simply place the logic switch in my circuit in series, or if there's a simple circuit I can implement.

I want to come up with a circuit with a constant currents source where as you increase the potentiometer value, the voltage goes up and once it reaches the cutoff, the output would go to zero.

Any help would be appreciated.

simulate this circuit – Schematic created using CircuitLab

• I think you want something involving an analog comparator, rather than a logic gate (or perhaps as well as a logic gate), but your requirements aren't very clear to me. The 74HC4052 is a dual four input analog switch - it is not clear how it relates to your problem. Sep 13, 2018 at 3:01
• @Peter Bennett. I naively thought i could just use one of the four NAND gates built in the package. Sep 13, 2018 at 3:15
• The logic gates shown on the '4052's fuctional diagram are not directly accessible from outside fof independent use. Sep 13, 2018 at 3:33
• @Peter Bennett thank you. I swear when i pulled up the datasheet, it looked more like the schematic of DM7400. I must have looked at something else. Also, totally unaware of the ill defined nature of intermediate values between low and high Sep 13, 2018 at 3:59