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In TI's LMH6518 datasheet, it shows a JFET LNA implementation:

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What's the purpose of C5, R17 and R49?

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  • \$\begingroup\$ Pat of pole-zero residue, needing cancellation in the DC-feedback loop? \$\endgroup\$ – analogsystemsrf Sep 13 '18 at 4:31
  • \$\begingroup\$ It's dependent on what the load circuit is and your diagram doesn't indicate that. \$\endgroup\$ – Andy aka Sep 13 '18 at 7:03
  • \$\begingroup\$ The port 'LMH6518+IN' goes to LMH6518 positive input, and 'LMH6518-IN' goes to LMH6518 negative input. \$\endgroup\$ – diverger Sep 13 '18 at 7:26
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    \$\begingroup\$ Fig 61 gives you clues. \$\endgroup\$ – Andy aka Sep 13 '18 at 11:42

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