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I have 2 DDR3 x16 chips (MT41K256M16xx) interfaced with an FPGA (M2S150TS-1FCS536). I plan on using point-to-point data & fly-by address/command topologies.

I'm using ECC with a 16 bit bus, so 18 bits total. Because of that, one of the chips is mostly unused. I tried to disable the upper byte by pulling UDM and UDQS high, and UDQS# down with 1k resistors.

How should I connect the unused DQ pins on the partially used byte? How about the unused byte?

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    \$\begingroup\$ Unless you just ground them with 1K resistors you can add more code to insert frame or folder or page markers on the fly. While not needed in most cases, it can help identify/verify burst-mode segments, etc. I would avoid inserting data that has no relationship to data at the same addresses. \$\endgroup\$
    – user105652
    Commented Sep 15, 2018 at 4:58
  • \$\begingroup\$ @Sparky256 My controller in the FPGA only support 18 bits, so 1k resistor it is. I was afraid of doing something wrong with on-die terminations and calibrations. Want to write an answer? \$\endgroup\$
    – pserra
    Commented Oct 1, 2018 at 23:48

1 Answer 1

Reset to default
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Unless you just ground them with 1K resistors you can add more code to insert frame or folder or page markers on the fly. While not needed in most cases, it can help identify/verify burst-mode segments, etc. I would avoid inserting data that has no relationship to data at the same addresses.

The wrong thing to do would be to let the pins float. As outputs it would be no issue but as inputs they need a 1K resistor to ground. This grounds them if they are inputs and is a mild load (1.35mA per pin) if they become outputs set to '1'.

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