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What I'm actually interested in is how non-MIPI data is converted to CSI2. Say I'm feeding a P-bit pixel to a CSI2 camera with n data lanes, how are the bits shared among the data lanes? If the pixel was serialized into a P-bit word, or if the pixel came in from a P-bit parallel bus (doesn't matter), does each lane simply take P/n of P bits and just transmit them (perhaps adding some overhead)? If that is the case then data rate C is scaled down proportionally to C/n.

I tried looking it up on the MIPI Alliance website itself but I couldn't find anything solid in their PHY overviews. Also I'm not sure if I'm asking about confidential IP here.

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