Here is an analysis, using HFI, EFI, PSI and GPI interferers. These are Magnetic field, inducing deterministic trash into the loop of Signal Trace above Plane; Electric field inducing displacement currents into impedance of circuit nodes; Power supply ripple/switching noise/LC ringing where the circuit / ADC PSRR is inadequate; Ground noise, where ground_impedance * ground_currents are computed. The total of these 4 interferers is 14 milliVolts.
I configured the tool --- Signal Chain Explorer --- for 20 volts PP into the ADC; edited the Master Sampling Specs for 18 bits and 10KHz sample rate; the ADC internal sample-hold is 50 ohms and 48 pF default values. Many of these specs can be edited.
Resultant SNR with NO interferers is 109 dB.
Resultant SNR with interferers (I added additional interferers from the Gargoyle tables, to be realistic in a Arduino system), is only 54 dB.
Conclusion: blindly building such a system will produce a 9 bit measurement with 9 extra bits of deterministic noise.
Here, below, are results of injecting the 4 types of interferers, with the system frequency response used to model the deterministic trash upset to the Code Spread (the noise floor, or the SNR). Note the Magnetic Field of the way-too-close MCU clock is the biggest problem.
Here is the HFI (magnetic field) table; the 10MHz Switch Reg is default active; you can turn it off.
You can edit any of the parameters, including Distance, to explore how close or how far away some field generators may be placed yet still achieve your SNR goals.
Here is the EFI (electric field) table;
What can you do, to greatly reduce the deterministic noise floor from the 4 types of interferers? (Note the thermal noise floor, with KT sources only being the sensor 50 ohms and the ADC 50 ohms ---- both editable ---- only contribute 9 microVolts RMS in the system bandwidth; if you want 20 bits, you'll need to reduce this 9uV; but first lets improve on the existing 14 milliVolts of deterministic trash.
The primary issue is the too-close location of switching power supplies and of the MicroController CLock/IO lines.
The switching power is only 10 milliMeters away, with an assumed Switching Frequency and dI/dT. Move that away, and shield it.
How accurate is the HFI number? We use a loop area, defined by trace length and trace height-above-gnd (both editable); we state the Distance from Wire-to-Loop; we state the dI/dT in the wire; we assume worst-case (maximum induced voltage).
The MCU clock/IO line is 1 millimeter away from the ADC input trace; who would be so cramped for PCB area they would route a high-slew-rate clock/data trace only 1mm from a 18bit (or 24 bit) analog trace?
How accurate is the EFI number? We assume parallel-plate coupling in the absence of any other mechanical geometry. We know the slew-rate, and the embedded simulator of Signal Chain Explore computes the node impedance.