# Is this line detector safe?

I'm thinking about building a basic AC mains voltage detector. I'd like for it to be both protected and isolated, so I have a zener TVS and an optoisolator.

R1 and R3 are chosen so that between them, the expected peak voltage is equal to the standoff of the TVS.

Since it's a double-diode isolator there's no need for a rectifier bridge. After the optoisolator is a basic RC LPF and a Schmitt trigger. R2 and C1 will have to be fine-tuned so that on every cycle, the voltage creeps up to the inverter's high input voltage (minus some safe tolerance).

Is this safe? Is the concept sound?

• If safety is primary concern for you, make a simple capacitive-coupled voltage detector. Tune it for 5 mm detection range and wrap antenna couple turns over hot wire. Sep 21 '18 at 8:41
• @Maple like electronics.stackexchange.com/a/95058/10008 ? Sep 21 '18 at 15:04
• Yes, something like that or that or that. There are tons of them on the web. No need to connect to high voltage at all Sep 21 '18 at 15:37

Let's start by analyzing what you have designed.

I'll ignore C1 for the moment.

1. To hold the Schmidt trigger input low requires the opto to sink 3.3mA, the pull down current for the gate can be ignored.
2. The transfer ratio for the opto is about 20% minimum so you need a minimum of 5 * 3.3mA or about 17mA through the LEDs.
3. With the resistors you chose for the input this would require a minimum of 3210 * 0.017 or about 57V (55 + LED Vf=1.7max) to supply the current. The voltage at the junction of R3,R1 is going to be about 10.5V.
4. The TVS will conduct at about 31.5V minimum, at that point the current through the LED would be about 59mA and the input voltage would have to be about 189V. The peak of the AC mains cycle is only 170V, so the TVS will clearly never conduct with your design. You will also never of course reach the 59mA level into the LED, you will only get about 52mA maximum.

Update: The TVS datasheet shows that the value you used (28.2V) is the largest value where the TVS WILL NOT conduct. The value where the TVS begins to conduct (1mA is the threshold ) is between 31.4 and 34.7V. I used 31.5V for convenience, you could go back and consider best case at 31.4V. However if you consider worst case devices at 34.7V @ 1mA, then you have an even greater discrepancy in input voltage required to cause the device to conduct. Short story. The TVS in the circuit as designed is non-functional, it will never conduct.

As Dave suggested you can increase the value of R2 to reduce the output sink current and therefore lower the input current required, but at lower input current the CTR drops as well. From the LTV-814 datasheet you can see that as you reduce the input current the CTR plummets.

You can see from the above, the 17mA required by your design is about ideal to maximize the CTR, though you should design for minimum CTR of 20% for the spread of devices.
If you use Dave's suggestion and use a 10K Ohm for R2 (a 500uA load), while this reduces the input current requirement you can see the CTR drops and if you look at Fig3 in the datasheet the VCE(sat) rises which means you can't pull the gate input low.
If you set the input current to be say 5mA the CTR has dropped by 25%. If you dropped the input current to 1mA, the CTR has dropped by almost 70%.

My suggestion would be to reset the ratio of R3,R1 so that at the minimum current requirement of the input LED the TVS is about to conduct.
If you keep the input current at 17mA this would mean setting R1 to 1.8K Ohm and R3 to 1.5K Ohm. Double these values and you'd drop the current to 8.5mA and I would not suggest going below that.

The last thing to mention is the value of C1. The opto output does not act like a normal transistor, it acts more as a CC source. This is complicated by the fact that the input drive is a sine wave somewhat, though now the input is being clipped correctly the LED is being driven with a constant voltage/current once the TVS conducts.

The C1 value required will be smaller than you imagine (I'll leave you to work that value out) since the collector current is limited to an essentially fixed value due to the way the opto works. Imagine that the devices you use are all better than the worst case (better than 20% CTR). You might be able to sink 2 or 3 times the current required by R2. However this will still result in a slow charge time for C1.

Update_2:

If you want to play with the front end resistor values, you could use the schematic below, which can be simulated. I've altered the Zener values to make it work since there is no TVS in the schematic editor.

simulate this circuit – Schematic created using CircuitLab

• Your point (1) neglects the effects of transistor saturation voltage and inverter input low level. Sep 21 '18 at 15:08
• Also, how do you arrive at 31.5V conduction voltage for the TVS? I don't see that figure in the specsheet. Sep 21 '18 at 15:36
• @Reinderien You are absolutely right, the difference in current for only the valid low level needs to be considered that gives you a range of 3 - 3.3mA. For a back of the cocktail napkin my numbers were quit OK of course. The main point was that 1) The TVS would never conduct and 2) the timing delay of C1 was seriously wrong. I could go through a detailed analysis with the spread of value but that's not what you can do on a forum like this. Sep 21 '18 at 15:37
• @Reinderien I added detail about the TVS. Short story; it will not conduct with the values you have on 110-120V AC. Sep 21 '18 at 15:58
• @JackCreasey "The C1 value required will be smaller than you imagine" - Experimentally this has proven to be very true. I ended up using a collector resistance of 22k and a cap of only 47nF to get what I wanted. Oct 3 '18 at 23:43

Note the amount of power that R3 needs to dissipate:

$$\frac{V_{RMS}^2}{R} = \frac{90^2 V}{2700 \Omega} = 3 W$$

33 mA is rather more than you need to operate the optocoupler. 5 mA would probably be enough, so raise R3 to 18 kΩ and it only needs to dissipate 450 mW. Use a 1W unit. Also, you can raise the value of R1 to about 4700 Ω

Even with a worst-case current transfer ratio of 0.2, this still gives you 1 mA(RMS) pull-down current at the output. Raise R2 to about 10 kΩ to give you a reliable low at the input to the inverter.

As an aside, most people would connect C1 between the signal and ground (rather than Vcc), but it really doesn't make that much difference.

• How do you arrive at 90Vrms? 120*2700/(510 + 2700) = 101Vrms Sep 21 '18 at 15:02
• @Reinderien: 120 Vrms line voltage, minus the (roughly) 30 Vrms across the TVS. I was assuming that the TVS was being driven into conduction most of the time, but as it turns out, it isn't. Sep 21 '18 at 15:09
• OK; and a followup question in that case: shouldn't I design so that the TVS's reverse standoff voltage is equal to the peak voltage of the signal between the resistors? i.e. it wouldn't be useful to use its Vrso as an RMS quantity. Sep 21 '18 at 15:17
• Sure, that makes sense. Sep 22 '18 at 10:32
• Yes, that works too. Just be aware that the capacitors' impedance to high-frequency transients is much lower, so you should still have some resistance in the circuit to protect the LEDs. Sep 22 '18 at 20:26

As has been mentioned, reduce the LED current to the minimum required (plus a bit of headroom).

I would find the total resistance required, ignoring the TVS. Then split that resistor value in half and install the appropriate value of TVS at the midpoint of the two resistors.

Splitting the resistors in half allows the dissipation to shared between the two resistors, allowing them each to be of a lower power rating.

Also pay attention to the maximum voltage rating of the resistors. Again - splitting the total required resistance into two resistors also splits the voltage drop across those resistors.

• I like the idea of resistor division by 2, but in practice, TVS come in a limited number of fixed values. So I can aim for "approximately half" and then need to tweak it a bit. Sep 21 '18 at 15:06

Making the built circuit safe also depends upon the layout of the components and wiring (or PCB traces). Making certain that line side and isolated side are truly separated.