It's a pretty standard procedure to use a resistive potential divider to convert a 5 volt signal level to a 3.3 volt signal level but there are a couple of concerns: -
- You need to choose resistor values that are not so low that the 5 volt signal is unduly reduced due to a loading effect. This means you need to understand the source impedance of your input signal and make sure that the loading effect of the potential divider is not too great.
- You need to choose resistor values that are not so high that the 3 volt output signal presents an impedance to the ADC input that causes measurement errors.
These two requirements are of course contradictory but there is usually a range of values for your potential divider that works despite the contradiction.
In cases where there is no common ground that satisfies these two conditions (without unduly affecting the input signal or making the output impedance too high for the ADC), an op-amp buffer can be used. However, this introduces another set of limitations in that op-amps usually can't: -
- Accurately drive an output signal down to close to 0 volts
- Accurately drive an output signal close to its upper power rail limit
In addition, an op-amp buffer may introduce an offset error of a few millivolts So care must be taken when using an op-amp buffer but it is the usual turn-to solution when the input impedance to your voltage signal source needs to be fairly high.
Added to all of this is the ADC's input voltage range; it's never as good as it seems when casually reading the front page of a data sheet; there will be a zero offset voltage that might mean a digital offset even when the input signal is precisely 0 volts AND there may be a gain error to consider that might mean the full-scale digital output is not reached even with your maximum signal.
And finally (hopefully) you do need to "worry" about over-voltage protection should the input actually rise to maybe 6 or 7 volts or even go to negative values.