7
\$\begingroup\$

This question already has an answer here:

As far as understand, it would make no difference to the operation of an SRAM if you mixed up the order of the address or data pins.

E.g. http://www.farnell.com/datasheets/1911297.pdf?_ga=2.220805788.545458806.1537605448-1970519925.1482350159

Removable non-volatile chips, such as PROMs and EEPROMs, have address and data pin numberings defined, as they need to be consistent across programmers and application circuits.

Why do SRAM chips have numbered data and address pins?

Is there any operation impact if I swap address pins around to make a PCB easier to route?

\$\endgroup\$

marked as duplicate by Dave Tweed Sep 22 '18 at 11:08

This question has been asked before and already has an answer. If those answers do not fully address your question, please ask a new question.

9
\$\begingroup\$

You are quite correct. With an SRAM, where all address pins are equivalent, you can indeed juggle the address pins around within their set on your board to ease layout, and also for the data pins. I would strongly advise putting a note on the board that you've done this, to avoid freaking out any subsequent engineer who comes along to debug or modify it.

Why are they labelled? If the pin functions were labelled 'pool of address pins' and 'pool of data pins', then at some point your CAD tool would insist on identifying them, and you would need to make a choice, even if it was only 'ADR_line_pin_23' sort of identifiers. So they do it for you. It's convenient, and recognisable, each pin has a physical identifier and a function identifier.

When the manufacturer does it, and is consistent with standards like JEDEC, it eases the task of engineers debugging stuff. If I've learned the pinout of a particular package style, then I can expect to find those signals on the same pins without an extra translation step through the schematic, the less mental work I have to do when debugging, the better. 'Let's see, this is word addressable, so the LSB adress shouldn't be changing at all as it reads memory, now where is the LSB'.

Exactly the same goes for multiple functions in a single package. While a quad opamp in a single package tends not to be labelled amp0, amp1 etc, a triple analogue switch does tend to be labelled s0, s1 and s2.

\$\endgroup\$
  • \$\begingroup\$ +1 for "put a note on the board". If you ever hook a logic analyzer to these address and data pins to debug something, forgetting about the pin swap will leave you very confused. \$\endgroup\$ – Guntram Blohm Sep 22 '18 at 9:59
7
\$\begingroup\$

Some reasons :

  • Pinouts are often standardized between static RAM and EPROM/FLASH: "JEDEC"

  • RAMs are usually arranged in matrices with lines and columns. Using consecutive addresses may require a little bit less power. For events that affect the matrix, such as hardware defects or a SEU (high energy particle hitting atoms), knowing which memory cells are adjacent may be useful for finding errors or designing error correction codes.

Yes, you can swap address and data pins on static RAM.

\$\endgroup\$
  • 1
    \$\begingroup\$ The standardisation isn't good - the 4Mbit SRAM AS6C4008 and the 4Mbit EPROM AT27C040 have A15, A14 and A18 on different pins. \$\endgroup\$ – fadedbee Sep 22 '18 at 9:03
0
\$\begingroup\$

Is there any operation impact if I swap address pins around to make a PCB easier to route?

If your design uses different chips to transfer data stored in a memory chip then the transfer of that data relies on both accessing chips knowing the data and address bus the same way.

\$\endgroup\$
  • 1
    \$\begingroup\$ Sorry, I cannot understand your answer. Have you read the accepted answer? How does your answer differ? \$\endgroup\$ – fadedbee Sep 22 '18 at 9:29
  • \$\begingroup\$ @fadedbee you may not be able to understand my answer but that doesn't mean I'm wrong; if two devices pass data to each other via a memory chip then both devices need to use the same pin orders for data and address bits else garbage will result. You asked "Why do SRAM chips have numbered data and address pins?" and I'm providing you a sensible reason for a manufacturer putting numbers (aka names) on the pins so that there is no confusion when connecting two devices to a shared memory. Instead of down voting first and then asking questions, you should try to understand first. \$\endgroup\$ – Andy aka Sep 22 '18 at 9:43

Not the answer you're looking for? Browse other questions tagged or ask your own question.