# When is an input signal considered small for BJT and JFET devices?

I can't find a detailed answer to this question. What is the condition for a signal to be considered small, so that you have to use small signal modeling? Also how is this condition derived for both BJT and JFET.

It's not that you have to use small signal modelling when the signal is small...it's that you can use small signal modelling when the signal is small. A small signal model will typically be much simpler to compute than a large signal model.

The reason the small signal model is simpler to compute, is that it linearizes all the circuit behavior around an operating point. It assumes that any change in the input signal will be reflected by a proportional change in the output signal. Equivalently, it assumes that with sinusoidal inputs, there will be no harmonic frequencies generated at any of the circuit nodes. In the small signal regime, the simulation can be done using pure linear algebra, without having to solve transcendental functions or do numerical integrations.

So when are you allowed to use a small signal model? Basically when the signals are small enough that the nonlinear behavior is negligible. How small this is depends on the exact details of the devices and the circuit, and on how accurate you need the result to be. As the signal amplitudes increase, the small signal model will be more and more inaccurate. It's up to you to decide when this inaccuracy is too much.

For a quantitative answer to complement The Photon's answer, consider the diode equation:

$i_D = I_Se^{v_D/nV_T}$

$i_D = I_D + i_d, v_D = V_D + v_d$

Taylor expand about the operating point $V_D, I_D$

$I_D + i_d = I_Se^{V_D/nV_T} \cdot [1 + \frac{v_d}{nV_T} + \frac{1}{2}(\frac{v_d}{nV_t})^2 + ...]$

For $v_d$ small enough, we can ignore the squared and higher order terms. How small is small enough? That depends on how many significant figures you're working to.

Let's say that we want the squared term to be at least 100 times smaller than the linear term:

$\frac{1}{2}(\frac{v_d}{nV_t})^2 < \frac{1}{100}\frac{v_d}{nV_T}$

This true as long as:

$v_d < \frac{nV_T}{50}$

Using $n = 1, V_T = 26mV$, we have:

$v_d < 520\mu V$

So, for signal amplitudes less than $520 \mu V$, the non-linear terms are at least 100 times smaller than the linear term.

For the BJT, the result is nearly identical. For the JFET, a square-law device, the details are different but you proceed in the same way.

• Very insightful answer on this often overlooked question, another equivalent small signal criteria (can be derived also from above discussion) is that the output current AC magnitude iD is far less than it's quiescent current ID (e.g. 1/100 of it). This brings another interesting question on how class-A power amplifier be considered to be linear(low-distortion), for which my answer is that power stage is amplifying current instead of voltage, so the low-distortion is possible only when input can be viewed as a current source. Commented Feb 20, 2019 at 2:51
• In practice low-distortion is achieved through carefully designed negative feedback。The amplifier is designed with sufficiently large gain, the non-linearity is not a problem when negative feedback is introduced. Commented Feb 21, 2019 at 6:11