It seems that the flash memory on most microcontrollers that stores the assembly code is NAND flash, which is only accessible on a per-block basis. Does the CPU has to fetch an entire block to execute the code, or am I mistaken and is it made of NOR flash that is byte accessible?
The datasheet of the ATmega 186 says the following:
This is the basic pipelining concept to obtain up to 1 MIPS per MHz with the corresponding unique results for functions per cost, functions per clocks, and functions per power-unit.
The datasheet is not very clear what the technology is behind this "flash", but is seems to be different from the EEPROM that is used for the data, that has 10 times as many write cycles.
Edit: the possible suggested duplicate question and answers are about pipelining, not about the storage technology.